EM78P510N
8-Bit Microcontrollers
Table 6 R Oscillator Frequencies
Pin
Rext
51k
Average Fosc 5V, 25°C
2.2221 MHz
Average Fosc 3V, 25°C
2.1972 MHz
R-OSCI
100k
300k
2.2M
1.1345 MHz
1.1203 MHz
381.36kHz
374.77kHz
Xin
32.768kHz
32.768kHz
1
Note: : Measured based on DIP packages.
2: The values are for design reference only.
6.6.4 Phase Lock Loop (PLL Mode)
When operating in PLL mode, the High frequency is determined by the sub-oscillator.
RC (Bank 0) register can be chosen to change to high oscillator frequency. The relation
between high frequency (Fm) and sub-oscillator is shown on the table below:
Fig. 6-11 Circuit for PLL mode
Bits 4~6 (CLK0~CLK2) of RC (Bank 0): Main Clock Selection Bits for PLL Mode
(Code Option Select)
CLK2
CLK1
CLK0
Main Clock
Fs × 122
Fs × 61
Example Fs = 32.768K
3.997 MHz
0
0
0
0
1
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
X
1.998 MHz
Fs × 61/2
Fs × 61/4
Fs × 244
Fs × 366
Fs × 488
0.999 MHz
499.7 kHz
7.995 MHz
11.99 MHz
15.99 MHz
Product Specification (V0.9) 09.12.2006
(This specification is subject to change without further notice)
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ELAN [ ELAN MICROELECTRONICS CORP ]
