欢迎访问ic37.com |
会员登录 免费注册
发布采购

EM78P447SBWM 参数 Datasheet PDF下载

EM78P447SBWM图片预览
型号: EM78P447SBWM
PDF下载: 下载PDF文件 查看货源
内容描述: 8位微控制器 [8-BIT MICRO-CONTROLLER]
分类和应用: 微控制器外围集成电路光电二极管可编程只读存储器
文件页数/大小: 55 页 / 1601 K
品牌: ELAN [ ELAN MICROELECTRONICS CORP ]
 浏览型号EM78P447SBWM的Datasheet PDF文件第5页浏览型号EM78P447SBWM的Datasheet PDF文件第6页浏览型号EM78P447SBWM的Datasheet PDF文件第7页浏览型号EM78P447SBWM的Datasheet PDF文件第8页浏览型号EM78P447SBWM的Datasheet PDF文件第10页浏览型号EM78P447SBWM的Datasheet PDF文件第11页浏览型号EM78P447SBWM的Datasheet PDF文件第12页浏览型号EM78P447SBWM的Datasheet PDF文件第13页  
EM78P447S  
OTP ROM  
3. R2 (Program Counter) & Stack  
• Depending on the device type, R2 and hardware stack are 10-bit wide. The structure is depicted in  
Fig.3.  
• Generating 1024×13 bits on-chip OTP ROM addresses to the relative programming instruction codes.  
One program page is 1024 words long.  
• R2 is set as all "0"s when under RESET condition.  
• "JMP" instruction allows direct loading of the lower 10 program counter bits. Thus, "JMP" allows PC  
to go to any location within a page.  
• "CALL" instruction loads the lower 10 bits of the PC, and then PC+1 is pushed into the stack. Thus,  
the subroutine entry address can be located anywhere within a page.  
• "RET" ("RETL k", "RETI") instruction loads the program counter with the contents of the top-level  
stack.  
• "ADD R2,A" allows the contents of ‘A’ to be added to the current PC, and the ninth and tenth bits of  
the PC are cleared.  
• "MOV R2,A" allows to load an address from the "A" register to the lower 8 bits of the PC, and the ninth  
and tenth bits of the PC are cleared.  
• Any instruction that writes to R2 (e.g. "ADD R2,A", "MOV R2,A", "BC R2,6",⋅⋅⋅⋅⋅) will cause the ninth  
and tenth bits (A8~A9) of the PC to be cleared. Thus, the computed jump is limited to the first 256  
locations of a page.  
• All instruction are single instruction cycle (fclk/2 or fclk/4) except for the instruction that would change  
the contents of R2. Such instruction will need one more instruction cycle.  
R3  
000H  
001H  
002H  
A11 A10 A9 A8  
A7  
~
A0  
Hardware Vector  
Software Vector  
CALL  
RET  
RETL  
On-chip Program  
Memory  
RETI  
00 PAGE0 0000~03FF  
Stack Level 1  
Stack Level 2  
Stack Level 3  
Stack Level 4  
Stack Level 5  
01 PAGE1 0400~07FF  
10 PAGE2 0800~0BFF  
11 PAGE3 0C00~0FFF  
Reset Vector  
FFFH  
Fig. 3 Program Counter Organization  
This specification is subject to change without prior notice.  
9
06.25.2003 (V1.1)  
 复制成功!