EM78P417N/418N/419N
8-Bit Microprocessor with OTP ROM
8.1 AD Converter Characteristic
(Vdd=2.5V to 5.5V,Vss=0V,Ta=25℃)
Symbol
VAREF
VASS
Parameter
Analog reference voltage
Analog input voltage
Analog supply current
Condition
Min.
2.5
Typ.
Max.
Vdd
Unit
V
VAREF - VASS≧2.5V
Vss
VASS
750
-10
Vss
V
VAI
VAREF
1000
+10
V
Ivdd
IAI1
850
0
uA
uA
uA
Vdd=VAREF=5.0V, VASS
=0.0V(V reference from Vdd)
Ivref
Vdd=VAREF=5.0V, VASS
=0.0V(V reference from
VREF)
Ivdd
IAI2
500
600
820
Analog supply current
OP current
IVref
200
250
300
uA
Vdd=5.0V, OP used
IOP
450
550
650
uA
Output voltage swing 0.2V to
4.8V
RN
LN
Resolution
Vdd=VAREF=5.0V, VASS =0.0V
Vdd = 2.5 to 5.5V Ta=25℃
Vdd = 2.5 to 5.5V Ta=25℃
Vdd=VAREF=5.0V, VASS =0.0V
Vdd=VAREF=5.0V, VASS =0.0V
10
0
11
±4
Bits
LSB
LSB
LSB
LSB
Linearity error
±8
±0.9
±8
DNL
FSE
OE
Differential nonlinear error
Full scale error
Offset error
0
±0.5
±4
±0
±0
±2
±4
Recommended impedance of
analog voltage source
ZAI
0
8
10
KΩ
TAD
TCN
ADIV
ADC clock duration
Vdd=VAREF=5.0V, VASS =0.0V
Vdd=VAREF=5.0V, VASS =0.0V
Vdd=VAREF=5.0V, VASS =0.0V
4
15
0
us
TAD
V
AD conversion time
15
VAREF
0.3
ADC OP input voltage range
0
0.2
4.8
0.3
Vdd=VAREF=5.0V, VASS
=0.0V,RL=10KΩ
ADOV
ADC OP output voltage swing
V
4.7
0.1
±0
5
ADSR
PSR
ADC OP slew rate
Vdd=VAREF=5.0V, VASS =0.0V
Vdd=5.0V±0.5V
V/us
LSB
Power Supply Rejection
±2
NOTE: 1. These parameters are hypothetical (not tested) and are provided for design reference only.
2. There is no current consumption when ADC is off other than minor leakage current.
3. AD conversion result will not decrease when the input voltage is increased, and no missing code
will result.
4. These parameters are subject to change without further notice.
68 •
Product Specification (V1.0) 06.23.2005
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
