EM78P350N
8-Bit Microprocessor with OTP ROM
Signal
Sleep Mode
Idle Mode
Normal Mode
RE (ADWE) Bit 3 = 1, DISI + RE (ADWE) Bit 3 = 1, DISI +
DISI + IOCF (ADIE) Bit 4=1
IOCF (ADIE) Bit 4 = 1
IOCF (ADIE) Bit 4 = 1
Wake-up+ Next Instruction+ Wake-up+ Next Instruction+ RF
RF (ADIF) = 1, (ADIF) = 1,
Oscillator, TCC and TIMERX Oscillator, TCC and TIMERX
Next Instruction+ RF (ADIF)=1
ENI + IOCF (ADIE) Bit 4 = 1
keep on running.
Wake-up when ADC
completed.
keep on running.
Wake-up when ADC
completed.
AD Conversion
RE (ADWE) Bit 3 = 1, ENI + RE (ADWE) Bit 3 = 1, ENI +
IOCF (ADIE) Bit 4 = 1
Wake-up+ Interrupt Vector
(0x08)+ RF (ADIF) = 1,
IOCF (ADIE) Bit 4 = 1
Wake-up+ Interrupt Vector
(0x08)+ RF (ADIF) = 1,
Oscillator, TCC and TIMERX Oscillator, TCC and TIMERX
Interrupt Vector (0x08)+ Set RF
(ADIF) = 1
keep on running.
Wake-up when ADC
completed.
keep on running.
Wake-up when ADC
completed.
RE (PWMWE) = 0, IOCA
(PWMIE) bit 0 = 0, if TxS = 1
Only sub-clock oscillate.
PWM wake-up is invalid.
RE (PWMWE) = 0, IOCA
(PWMIE) Bit 0 = 1, if TxS = 1
Set PWMIF = 1
DISI + IOCF (PWMXIE) = 1
Next Instruction+ Set RF
(PWMXIF) = 1
ENI + IOCF (PWMXIE) = 1
Only sub-clock oscillate.
PWM wake-up is invalid.
RE (PWMWE) = 1, IOCA
(PWMIE) Bit 0 = 1, if TxS = 0
Wake-up+ Next Instruction,
Only sub-clock oscillate.
RE (PWMWE) = 1, IOCA
(PWMIE) Bit 0 = 1, DISI, if
TxS = 1
PWMX (PWM1, PWM2, PWM3)
(When TimerX matches PRDX)
N/A
Interrupt Vector (0x08)+ Set RF
(PWMXIF) = 1
Wake-up+ Next Instruction,
Only sub-clock oscillate.
RE (PWMWE) = 1, IOCA
(PWMIE) Bit 0 = 1, ENI, if
TxS = 1
Wake-up+ Interrupt Vector
(0x08)+ Set RF (PWMIF) = 1
Only sub-clock oscillate.
RE (CMPWE) Bit 2 = 0,
IOCE (CMPIE) Bit 0 = 0
Comparator output status
RE (CMPWE) Bit 2 = 0,
IOCE (CMPIE) Bit 0 = 0
Comparator output status
IOCF (CMPIE) Bit 7 = 0
Comparator output status
change interrupted
is invalid.
changed wake-up is invalid. changed wake-up is invalid.
Oscillator, TCC and TIMERX Oscillator, TCC and TIMERX
are stopped.
are stopped.
RE (CMPWE) Bit 2 = 0,
IOCE (CMPIE) Bit 0 = 1
Set RF (CMPIF) = 1,
Comparator output status
RE (CMPWE) Bit 2 = 0,
IOCE (CMPIE) Bit 0 = 1
Set RF (CMPIF) = 1,
Comparator output status
changed wake-up is invalid. changed wake-up is invalid.
Oscillator, TCC and TIMERX Oscillator, TCC and TIMERX
are stopped.
are stopped.
RE (CMPWE) Bit 2 = 1,
IOCE (CMPIE) Bit 0 = 0
Wake-up+ Next Instruction,
RE (CMPWE) Bit 2 = 1, IOCE
Comparator
(Comparator Output Status
Change)
(CMPIE) Bit 0 = 0
Wake-up+ Next Instruction,
Oscillator, TCC and TIMERX Oscillator, TCC and TIMERX
are stopped.
are stopped.
RE (CMPWE) Bit 2 = 1,
RE (CMPWE) Bit 2 = 1,
DISI + IOCE (CMPIE) Bit 0 = 1
DISI + IOCE (CMPIE) Bit 0 = 1 DISI + IOCE (CMPIE) Bit 0 = 1
Wake-up+ Next Instruction+ Wake-up+ Next Instruction+ Set
Set RF (CMPIF) = 1,
RF (CMPIF) = 1,
Next Instruction+ Set RF
(CMPIF) = 1
Oscillator, TCC and TIMERX Oscillator, TCC and TIMERX
are stopped.
are stopped.
RE (CMPWE) Bit 2 = 1,
RE (CMPWE) Bit 2 = 1,
ENI + IOCE (CMPIE) Bit 0 = 1
ENI + IOCE (CMPIE) Bit 0 = 1 ENI + IOCE (CMPIE) Bit 0 = 1
Wake-up+ Interrupt Vector
Wake-up+ Interrupt Vector
(0x08)+ Set RF (CMPIF) = 1, (0x08)+ Set RF (CMPIF) = 1,
Oscillator, TCC and TIMERX Oscillator, TCC and TIMERX
Interrupt Vector (0x08)+ Set RF
(CMPIF) = 1
are stopped.
are stopped.
WDT Time Out
IOCE (WDTE) Bit 7 = 1
Wake-up+ Reset
(Address 0x00)
Wake-up+ Reset
(Address 0x00)
Reset (Address 0x00)
54 •
Product Specification (V1.0) 09.14.2006
(This specification is subject to change without further notice)