EM78P350N
8-Bit Microprocessor with OTP ROM
6.6 Timer 4
6.6.1 Overview
Timer 4 (TMR4) is an 8-bit clock up-counter with a programmable prescaler. When TMR4
is in SPI baud rate clock generator mode (SBRS0, SBRS1 and SBRS2 are set to 1) and
SPI control register Bit 4 (SSE) is set to 1, Timer 4 will enable automatically without setting
TM4E. TMR4 can be read and written to and cleared on any reset conditions.
6.6.2 Function Description
Fig. 6-14 shows Timer 4 block diagram. Each signal and block is described as follows:
Set predict value (Bank 0-R9)
TM4E
0
Set TM4IF
Interrupt
and
SPI clock output
TMR4 value
Yes
In SPI baud
generator mode ?
1
TMR4
Up-counter
Overflow
Prescaler
1:1~1:16
No
T4ROS
Interrupt
OSC / 4
Fig. 6-14 Timer 4 Block Diagram
OSC/4: Input clock.
Prescaler: Option 1:1, 1:4, 1:8, and 1:16 defined by TM4P1 and TM4P2
(T4CON<1, 0>). It is cleared when a value is written to TMR4 or T4CON, and
during any kind of reset as well.
TMR4: Timer 4 register. TMR4 is incremented until it overflows, and then resets to
0. If it is in the SPI baud rate generator mode, its output is fed as a shifting clock.
TMR4 register; increases until it overflows, and then reloads the predicted value. If
writing a value to Timer 4, the predicted value and TMR4 value will be the set value.
However, if T4ROS is set to 1 and read value from TMR4, the value will be TMR4
direct value, else T4ROS is set to 0 and read value from TMR4, the value will be
TMR4 predicted value.
48 •
Product Specification (V1.0) 09.14.2006
(This specification is subject to change without further notice)