EM78P350N
8-Bit Microprocessor with OTP ROM
6.1.39 Bank3 R8 (Pull-low Control Register 4)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
“0”
“0”
“0”
/PL84
/PL83
/PL82
/PL81
/PL80
Bank 3 R8 register is both readable and writable.
Bits 7 ~ 5: Not used, set “0” at all time.
Bit 4 (/PL84): Control bit used to enable the pull-high function of the P84 output pin.
0 = Enable pull-low output
1 = Disable pull-low output
Bit 3 (/PL83): Control bit used to enable the pull-low function of the P83 output pin.
Bit 2 (/PL82): Control bit used to enable the pull-low function of the P82 output pin.
Bit 1 (/PL81): Control bit used to enable the pull-low function of the P81 output pin.
Bit 0 (/PL80): Control bit used to enable the pull-low function of the P80 output pin.
6.1.40 Bank3 R9 (Pull-High Control Register 1)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
/PH57
/PH56
/PH55
/PH54
/PH53
/PH52
/PH51
/PH50
Bank 3 R9 register is both readable and writable.
Bit 7 (/PH57): Control bit used to enable the pull-high function of the P57 output pin.
0 = Enable pull-high output
1 = Disable pull-high output
Bit 6 (/PH56): Control bit used to enable the pull-high function of the P56 output pin.
Bit 5 (/PH55): Control bit used to enable the pull-high function of the P55 output pin.
Bit 4 (/PH54): Control bit used to enable the pull-high function of the P54 output pin.
Bit 3 (/PH53): Control bit used to enable the pull-high function of the P53 output pin.
Bit 2 (/PH52): Control bit used to enable the pull-high function of the P52 output pin.
Bit 1 (/PH51): Control bit used to enable the pull-high function of the P51 output pin.
Bit 0 (/PH50): Control bit used to enable the pull-high function of the P50 output pin.
6.1.41 Bank 3 RA (Pull-High Control Register 2)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
/PH67
/PH66
/PH65
/PH64
/PH63
/PH62
/PH61
/PH60
Bank 3 RA register is both readable and writable.
Bit 7 (/PH67): Control bit is used to enable the pull-high of the P67 pin.
0 = Enable pull-high output
1 = Disable pull-high output
26 •
Product Specification (V1.0) 09.14.2006
(This specification is subject to change without further notice)