EM78P341N/342N/343N
8-Bit Microprocessor with OTP ROM
6.5.1.2 Register Initial Values after Reset
The following summarizes the registers initialized values.
Address Name
Reset Type
Bit Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
C57
C56
C55
C54
C53
C52
C51
C50
108C
341N 343N 341N 343N
108C
341N
341N
341N
342N
343N
342N
343N
342N
343N
Type
–
108C
108C
108C
–
–
342N
0
342N
0
N/A
IOC50
Power-on
1
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
1
1
1
1
/RESET and WDT
0
0
Wake-up from Pin
Change
0
P
0
P
P
0
P
0
P
0
P
P
P
Bit Name
C67
C66
C65
C64
C63
C62
C61
C60
108C
341N
342N
341N
341N
108C 342N 108C 342N 108C 342N 108C 342N
341N 343N 341N 343N 341N 343N 341N 343N
343
N
342N
343N
342N
343N
Type
–
108C
108C
N/A
IOC60
Power-on
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
/RESET and WDT
Wake-up from Pin
Change
P
0
P
0
P
0
P
0
P
0
P
0
P
0
P
Bit Name
X
0
0
X
X
0
0
X
0
0
X
0
0
X
0
0
C71
C70
Power-on
0
0
1
1
1
1
N/A
N/A
N/A
N/A
N/A
IOC70
IOC80
IOC90
/RESET and WDT
Wake-up from Pin
Change
P
P
P
P
P
P
P
P
Bit Name
X
0
0
X
0
0
CMPOUT COS1
COS0 TCCAEN TCCATS TCCATE
Power-on
0
0
0
0
0
0
0
0
0
0
0
0
/RESET and WDT
Wake-up from Pin
Change
P
P
P
P
P
P
P
P
Bit Name
TCCBHE TCCBEN TCCBTS TCCBTE
X
0
0
TCCCEN TCCCTS TCCCTE
Power-on
0
0
0
0
0
0
0
0
0
0
0
0
0
0
/RESET and WDT
Wake-up from Pin
Change
P
P
P
P
P
P
P
P
Bit Name
TCCCSE TCCCS2 TCCCS1 TCCCS0
IRE
0
HF
0
LGP IROUTE
Power-on
0
0
0
0
0
0
0
0
0
0
0
0
IOCA0
/RESET and WDT
0
0
(IR CR)
Wake-up from Pin
Change
P
P
P
P
P
P
P
P
Bit Name
/PD57
/PD56
/PD55
/PD54
/PD53
/PD52
/PD51
/PD50
Power-on
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
IOCB0
/RESET and WDT
(PDCR)
Wake-up from Pin
Change
P
P
P
P
P
P
P
P
44 •
Product Specification (V1.0) 12.01.2006
(This specification is subject to change without further notice)