EM78P259N/260N
8-Bit Microprocessor with OTP ROM
Bit 1 (ADE1 ): AD converter enable bit of P51 pin
0 = Disable ADC1, P51 acts as I/O pin
1 = Enable ADC1 acts as analog input pin
Bit 0 (ADE0 ): AD converter enable bit of P50 pin
0 = Disable ADC0, P50 acts as I/O pin
1 = Enable ADC0 acts as analog input pin
6.7.1.2 R9 (ADCON: AD Control Register)
7
6
5
4
3
2
1
0
VREFS
CKR1
CKR0
ADRUN
ADPD
-
ADIS1
ADIS0
ADCON register controls the operation of the AD conversion and decides which pin
should be currently active.
Bit 7(VREFS): The input source of the ADC Vref
0 = The ADC Vref is connected to Vdd (default value), and the
P54/VREF pin carries out the P54 function
1 = The ADC Vref is connected to P54/VREF
NOTE
The P54/TCC/VREF pin cannot be applied to TCC and VREF at the same time. IF
P54/TCC/VREF acts as VREF analog input pin, then CONT Bit 5 (TS) must be “0”.
The P54/TCC/VREF pin priority is as follows:
P54/TCC/VREF Pin Priority
High
Medium
TCC
Low
P54
VREF
Bit 6 ~ Bit 5 (CKR1 ~ CKR0):The ADC prescaler oscillator clock rate
00 = 1: 4 (default value)
01 = 1: 16
10 = 1: 64
11 = 1: WDT ring oscillator frequency
CKR0:CKR1 Operation Mode Max. Operation Frequency
00
01
10
11
Fsco/4
1 MHz
4 MHz
16MHz
–
Fsco/16
Fsco/64
Internal RC
46 •
Product Specification (V1.0) 06.16.2005
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
