EM78P259N/260N
8-Bit Microprocessor with OTP ROM
Address
Name
Reset Type
Bit Name
Bit 7
“0”
0
Bit 6
“0”
0
Bit 5
“0”
0
Bit 4
“0”
0
Bit 3
AD11
U
Bit 2
AD10
U
Bit 1
AD9
U
Bit 0
AD8
U
Power-On
RC
0XC
/RESET and WDT
0
0
0
0
U
U
U
U
(ADDATA1H)
Wake-Up from Pin
Change
0
0
0
0
P
P
P
P
Bit Name
AD7
U
AD6
U
AD5
U
AD4
U
AD3
U
AD2
U
AD1
U
AD0
U
Power-On
RD
0XD
0xE
0xF
/RESET and WDT
U
U
U
U
U
U
U
U
(ADDATA1L0)
Wake-Up from Pin
Change
P
P
P
P
P
P
P
P
Bit Name
–-
0
–
0
0
ADIF
CMPIF ADWE CMPWE ICWE
–
0
0
Power-On
0
0
0
0
0
0
0
0
0
0
RE
/RESET and WDT
0
(ISR2)
Wake-Up from Pin
Change
P
P
P
P
P
P
P
P
Bit Name
LPWTIF HPWTIF TCCCIF TCCBIF TCCAIF
EXIF
ICIF
0
TCIF
Power-On
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RF
/RESET and WDT
0
(ISR1)
Wake-Up from Pin
Change
P
P
P
P
P
P
P
P
Bit Name
–
U
P
–
U
P
–
U
P
–
U
P
–
U
P
–
U
P
–
U
P
–
U
P
Power-On
0x10~0x3F R10~R3F
/RESET and WDT
Wake-Up from Pin
Change
P
P
P
P
P
P
P
P
Legend: X: not used
P: previous value before reset
U: unknown or don’t care.
t: check table under Section 6.5.2
6.5.1.3 Controller Reset Block Diagram
VDD
D
Q
CLK
Oscillator
CLK
CLR
Power-On Reset
Voltage Detector
ENWDTB
/RESET
WDT Timeout
Reset
Setup time
WDT
Fig. 6-6 Controller Reset Block Diagram
Product Specification (V1.0) 06.16.2005
• 41
(This specification is subject to change without further notice)