EM78P258N
8-Bit Microprocessor with OTP ROM
The symbol "R" represents a register designator that specifies which one of the
registers (including operational registers and general-purpose registers) is to be
utilized by the instruction. The symbol "b" represents a bit field designator that selects
the value for the bit located in the register "R" that is affected by the operation. The
symbol "k" represents an 8 or 10-bit constant or literal value.
The following are the EM78P258N instruction set
Instruction Binary HEX Mnemonic
Operation
Status Affected
0 0000 0000 0000 0000 NOP
0 0000 0000 0001 0001 DAA
0 0000 0000 0010 0002 CONTW
0 0000 0000 0011 0003 SLEP
0 0000 0000 0100 0004 WDTC
No Operation
None
C
Decimal Adjust A
A → CONT
0 → WDT, Stop oscillator
0 → WDT
A → IOCR
Enable Interrupt
None
T,P
T,P
None1
None
None
None
None
None
None1
None
Z
0 0000 0000 rrrr
000r IOW R
0 0000 0001 0000 0010 ENI
0 0000 0001 0001 0011 DISI
0 0000 0001 0010 0012 RET
0 0000 0001 0011 0013 RETI
0 0000 0001 0100 0014 CONTR
Disable Interrupt
[Top of Stack] → PC
[Top of Stack] → PC, Enable Interrupt
CONT → A
IOCR → A
A → R
0 → A
0 0000 0001 rrrr
0 0000 01rr rrrr
001r IOR R
00rr MOV R,A
0 0000 1000 0000 0080 CLRA
0 0000 11rr rrrr
0 0001 00rr rrrr
0 0001 01rr rrrr
0 0001 10rr rrrr
0 0001 11rr rrrr
0 0010 00rr rrrr
0 0010 01rr rrrr
0 0010 10rr rrrr
0 0010 11rr rrrr
0 0011 00rr rrrr
0 0011 01rr rrrr
0 0011 10rr rrrr
0 0011 11rr rrrr
0 0100 00rr rrrr
0 0100 01rr rrrr
0 0100 10rr rrrr
0 0100 11rr rrrr
0 0101 00rr rrrr
0 0101 01rr rrrr
0 0101 10rr rrrr
0 0101 11rr rrrr
0 0110 00rr rrrr
0 0110 01rr rrrr
0 0110 10rr rrrr
0 0110 11rr rrrr
0 0111 00rr rrrr
0 0111 01rr rrrr
0 0111 10rr rrrr
00rr
01rr
01rr
01rr
01rr
02rr
02rr
02rr
02rr
03rr
03rr
03rr
03rr
04rr
04rr
04rr
04rr
05rr
05rr
05rr
05rr
CLR R
0 → R
R-A → A
R-A → R
R-1 → A
R-1 → R
A ∨ VR → A
A ∨ VR → R
A & R → A
A & R → R
A ⊕ R → A
A ⊕ R → R
A + R → A
A + R → R
R → A
R → R
/R → A
/R → R
R+1 → A
R+1 → R
R-1 → A, skip if zero
R-1 → R, skip if zero
R(n) → A(n-1),R(0) → C, C → A(7)
R(n) → R(n-1),R(0) → C, C → R(7)
R(n) → A(n+1),R(7) → C, C → A(0)
R(n) → R(n+1),R(7) → C, C → R(0)
Z
SUB A,R
SUB R,A
DECA R
DEC R
Z,C,DC
Z,C,DC
Z
Z
OR A,R
OR R,A
AND A,R
AND R,A
XOR A,R
XOR R,A
ADD A,R
ADD R,A
MOV A,R
MOV R,R
COMA R
COM R
Z
Z
Z
Z
Z
Z
Z,C,DC
Z,C,DC
Z
Z
Z
Z
INCA R
INC R
Z
Z
DJZA R
DJZ R
None
None
C
06rr RRCA R
06rr
06rr
06rr
07rr
07rr
07rr
RRC R
RLCA R
RLC R
C
C
C
SWAPA R R(0-3) → A(4-7),R(4-7) → A(0-3)
SWAP R
JZA R
None
None
None
R(0-3) ↔ R(4-7)
R+1 → A, skip if zero
Product Specification (V1.0) 06.16.2005
• 65
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
