EM78P258N
8-Bit Microprocessor with OTP ROM
6.11.1 Programmable WDT Time-Out Period
The Option word (WDTPS) is used to define the WDT time-out period (18ms5 or
4.5ms6). Theoretically, the range is from 4.5ms or 18ms. For most of crystal or ceramic
resonators, the lower the operation frequency is, the longer is the required set-up time.
6.11.2 External Power-on Reset Circuit
The circuit shown in the following figure implements an external RC to produce a reset
pulse. The pulse width (time constant) should be kept long enough to allow Vdd to
reach the minimum operating voltage. This circuit is used when the power supply has a
slow power rise time. Because the current leakage from the /RESET pin is about ±5µA,
it is recommended that R should not be great than 40 K. This way, the voltage at Pin
/RESET is held below 0.2V. The diode (D) acts as a short circuit at power-down. The
“C” capacitor is discharged rapidly and fully. Rin, the current-limited resistor, prevents
high current discharge or ESD (electrostatic discharge) from flowing into Pin /RESET.
Vdd
R
EM78P258N
D
/RESET
Rin
C
Fig. 6-18 External Power on Reset Circuit
6.11.3 Residual Voltage Protection
When the battery is replaced, device power (Vdd) is removed but the residual voltage
remains. The residual voltage may trips below Vdd minimum, but not to zero. This
condition may cause a poor power on reset. Fig. 6-19 and Fig. 6-20 show how to
create a protection circuit against residual voltage.
5
6
VDD=5V, WDT time-out period = 16.5ms ± 30%.
VDD=3V, WDT time-out period = 18ms ± 30%.
VDD=5V, WDT time-out period = 4.2ms ± 30%.
VDD=3V, WDT time-out period = 4.5ms ± 30%.
Product Specification (V1.0) 06.16.2005
60 •
(This specification is subject to change without further notice)