EM78P258N
8-Bit Microprocessor with OTP ROM
NOTE
In order to obtain accurate values, it is necessary to avoid any data transition
on I/O pins during AD conversion.
6.7.6.2 Sample Demo Programs
A. Define a General Registers
R_0 == 0
PSW == 3
; Indirect addressing register
; Status register
PORT5 == 5
PORT6 == 6
R_E== 0XE
; Interrupt status register
B. Define a Control Register
IOC50 == 0X5
IOC60 == 0X6
C_INT== 0XF
; Control Register of Port 5
; Control Register of Port 6
; Interrupt Control Register
C. ADC Control Register
ADDATA == 0xB
AISR == 0x08
ADCON == 0x9
; The contents are the results of ADC
; ADC input select register
;
7
6
5
4
3
2
1
0
;VREFS CKR1 CKR0 ADRUN ADPD ADIS2 ADIS1 ADIS0
D. Define Bits in ADCON
ADRUN == 0x4
ADPD == 0x3
; ADC is executed as the bit is set
; Power Mode of ADC
E. Program Starts
ORG 0
; Initial address
JMP INITIAL
;
ORG 0x0C
; Interrupt vector
JMP CLRRE
;
;
;(User program section)
;
;
CLRRE:
MOV A,RE
AND A, @0BXX0XXXXX ; To clear the ADIF bit, “X” by application
MOV RE,A
BS ADCON, ADRUN
; To start to execute the next AD conversion
if necessary
Product Specification (V1.0) 06.16.2005
• 47
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
