EM78P258N
8-Bit Microprocessor with OTP ROM
6.7 Analog-To-Digital Converter (ADC)
The analog-to-digital circuitry consisted of a 4-bit analog multiplexer; three control
registers (AISR/R8, ADCON/R9, & ADOC/RA), three data registers (ADDATA/RB,
ADDATA1H/RC, & ADDATA1L/RD), and an ADC with 12-bit resolution as shown in the
functional block diagram below. The analog reference voltage (Vref) and the analog
ground are connected via separate input pins.
The ADC module utilizes successive approximation to convert the unknown analog
signal into a digital value. The result is fed to the ADDATA, ADDATA1H, and
ADDATA1L. Input channels are selected by the analog input multiplexer via the
ADCON register Bits ADIS1 and ADIS0.
Vref
ADC3
ADC2
ADC1
ADC0
Power-Down
Start to Convert
ADC
( successive approximation )
Fsco
4-1
MUX
Internal RC
7
~ 0
1
0
3
4
3
11 10
9
8
7
6
5
4
3
2
1
0
6
5
ADCON
ADCON
ADCON
DATA BUS
RF
AISR
ADDATA1H
ADDATA1L
Fig. 6-9 Analog-to-Digital Conversion Functional Block Diagram
6.7.1 ADC Control Register (AISR/R8, ADCON/R9, ADOC/RA)
6.7.1.1 R8 (AISR: ADC Input Select Register)
7
6
5
4
3
2
1
0
–
–
–
–
ADE3
ADE2
ADE1
ADE0
AISR register defines the Port 5 pins as analog inputs or as digital I/O, individually.
Bit 7 ~ 4: Not used
Bit 3 (ADE3 ): AD converter enable bit of P53 pin
0 = Disable ADC3, P53 acts as I/O pin
1 = Enable ADC3 acts as analog input pin
Bit 2 (ADE2 ): AD converter enable bit of P52 pin
0 = Disable ADC2, P53 acts as I/O pin
1 = Enable ADC2 acts as analog input pin
42 •
Product Specification (V1.0) 06.16.2005
(This specification is subject to change without further notice)