EM78P257
OTP ROM
Address Name
Reset Type
Wake-Up from Pin
Change
Bit 7
P
Bit 6
P
Bit 5
P
Bit 4
P
Bit 3
P
Bit 2
P
Bit 1
P
Bit 0
P
Bit Name
Power-On
/PD57 /PD56 /PD55 /PD54 /PD53 /PD52 /PD51 /PD50
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
IOCB0
N/A
/RESET and WDT
Wake-Up from Pin
Change
(PDCR)
P
P
P
P
P
P
P
P
Bit Name
Power-On
OD67 OD66
OD65 OD64
OD63 OD62
OD61 OD60
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
IOCC0
N/A
/RESET and WDT
Wake-Up from Pin
Change
(ODCR)
P
P
P
P
P
P
P
P
Bit Name
Power-On
/PH57 /PH56 /PH55 /PH54 /PH53 /PH52 /PH51 /PH50
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
IOCD0
N/A
/RESET and WDT
Wake-Up from Pin
Change
(PHCR)
P
P
P
P
P
P
P
P
Bit Name
Power-On
WDTC
EIS
0
X
1
1
X
1
1
X
1
1
PSW2 PSW1 PSW0
0
0
1
1
1
1
1
1
N/A
N/A
N/A
N/A
IOCE0
IOCF0
/RESET and WDT
0
Wake-Up from Pin
Change
P
P
1
1
1
P
P
P
PPC/C
MP
Bit Name
CMP4IE CMP3IE CMP2IE CPM1IE
EXIE
ICIE
TCIE
Power-On
/RESET and WDT
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Wake-Up from Pin
Change
Bit Name
Power-On
/RESET and WDT
P
P
P
P
P
P
P
P
TCCA7 TCCA6 TCCA5 TCCA4 TCCA3 TCCA2 TCCA1 TCCA0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
IOC51
(TCCA)
Wake-Up from Pin
Change
P
P
P
P
P
P
P
P
TCCBL TCCBL TCCBL TCCBL TCCBL TCCBL TCCBL TCCBL
Bit Name
7
0
0
6
0
0
5
0
0
4
0
0
3
0
0
2
0
0
1
0
0
0
0
0
Power-On
IOC61
(TCCBL)
/RESET and WDT
Wake-Up from Pin
Change
P
P
P
P
P
P
P
P
TCCBH TCCBH TCCBH TCCBH TCCBH TCCBH TCCBH TCCBH
Bit Name
7
0
0
6
0
0
5
0
0
4
0
0
3
0
0
2
0
0
1
0
0
0
0
0
Power-On
IOC71
(TCCBH)
N/A
/RESET and WDT
Wake-Up from Pin
Change
P
P
P
P
P
P
P
P
Bit Name
TCCC7 TCCC6 TCCC5 TCCC4 TCCC3 TCCC2 TCCC1 TCCC0
Power-On
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
IOC81
(TCCC)
N/A
N/A
/RESET and WDT
Wake-Up from Pin
Change
P
P
P
P
P
P
P
P
IOC91
(LTR)
Bit Name
LTR7
0
LTR6
0
LTR5
0
LTR4
0
LTR3
0
LTR2
0
LTR1
0
LTR0
0
Power-On
This specification is subject to change without prior notice.
35
07.27.2004 (V1.4)