EM78P257
OTP ROM
• IOC5 , IOC6 and IOC7 are both readable and writable.
4. IOC80 ( TCC Control Register ):
7
6
5
4
3
-
2
-
1
-
0
-
TCC2E
TCC4E
TCC6E
TCCBE
• Bit 7 (TCC2E): Control bit used to enable the second input of counter
For EM78P257A
1 = If MOUSEN equal to ‘ 1’ , pin 12 is defined as another input pin of TCCA. If MOUSEN equal to ‘ 0’ ,
pin 12 is a bi-directional I/O pin.
0 = Define P66 as a bi-directional I/O pin.
For EM78P257B
1 = If MOUSEN equal to ‘ 1’ , pin 13 is defined as another input pin of TCCA. If MOUSEN equal to ‘ 0’ ,
pin 13 is a bi-directional I/O pin.
0 = Define P66 as a bi-directional I/O pin.
• Bit 6 (TCC4E): Control bit used to enable the second input of counter
For EM78P257A
1 = If MOUSEN equal to ‘ 1’ , pin 17 is defined as another input pin of TCCB. If MOUSEN equal to ‘ 0’ ,
pin 17 is a bi-directional I/O pin.
0 = Define P50 as a bi-directional I/O pin.
For EM78P257B
1 = If MOUSEN equal to ‘ 1’ , pin 18 is defined as another input pin of TCCB. If MOUSEN equal to ‘ 0’ ,
pin 18 is a bi-directional I/O pin.
0 = Define P50 as a bi-directional I/O pin.
• Bit 5 (TCC6E): Control bit used to enable the second input of counter (for EM78P257B only)
For EM78P257B
1 = If MOUSEN equal to ‘ 1’ , pin 20 is defined as another input pin of TCCC. If MOUSEN equal to ‘ 0’ ,
pin 20 is a bi-directional I/O pin.
0 = Define P57 as a bi-directional I/O pin.
• Bit 4 (TCCBE): Control bit is used to enable the most significant byte of counter
1 = Enable the most significant byte of TCCBH. TCCB is a 16-bits counter.
0 = Disable the most significant byte of TCCBH (default value). TCCB is an 8-bits counter.
• Bit 3~Bit 0 Not used.
This specification is subject to change without prior notice.
19
07.27.2004 (V1.4)