EM78815
8-Bit Microcontroller
Description
Symbol
Min. Typ. Max.
Unit
SDI set-up time to the reading edge of SCLK
SDI hold time to the reading edge of SCLK
SDO disable time
Tisu
Tihd
Tdis
25
25
−
ns
ns
ns
−
−
−
−
−
560
Note *1 : Controlled by software
*2 : Controlled by RC circuit
Data ROM access timing characteristic
Symbol
Tdiea
Tdiei
Tiew
Description
Condition
Cl=100pF
Min.
Typ.
Max.
30
Unit
ns
ns
ns
ns
ns
ns
ns
ns
Delay from Phase 3 end to INSEND active
Delay from Phase 4 end to INSEND inactive
INSEND pulse width
Cl=100pF
30
30
Tdca
Tacc
Delay from Phase 4 end to CA Bus valid
ROM data access time
C1=100pF
30
30
100
20
Tcds
ROM data setup time
Tcdh
ROM data hold time
20
Tdca-1 Delay time of CA-1
C1=100pF
70 •
Product Specification (V2.4) 02.17.2006
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
