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EM78808 参数 Datasheet PDF下载

EM78808图片预览
型号: EM78808
PDF下载: 下载PDF文件 查看货源
内容描述: [8-BITMICRO-CONTROLLER]
分类和应用:
文件页数/大小: 63 页 / 469 K
品牌: ELAN [ ELAN MICROELECTRONICS CORP ]
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EM78808  
8-bit Micro-controller  
SCK  
SDO  
SDI  
IO (PORT60)  
O (PORT61)  
Master: output pin, Slave: input pin. This pin shared with PORT60.  
Output pin for serial data transferring. This pin shared with PORT61.  
Input pin for receiving data. This pin shared with PORT62.  
I
(PORT62)  
Comparator  
CMP1  
CMP2  
CMP3  
I
I
I
(PORT63)  
(PORT64)  
(PORT65)  
Comparator input pins. Shared with PORT63, PORT64 and  
PORT65.  
CURRENT  
DA  
DAOUT  
O (PORT66)  
Current DA output pin. It can be a control signal for sound  
generating.  
Shared with PORT66.  
IO  
P55 ~P57  
P60 ~P67  
I/O  
I/O  
PORT 5 can be INPUT or OUTPUT port each bit.  
PORT 6 can be INPUT or OUTPUT port each bit.  
Internal pull high.  
P70 ~ P77  
I/O  
PORT 7 can be INPUT or OUTPUT port each bit.  
Internal Pull high function.  
Auto key scan function.  
Interrupt function.  
P80 ~ P87  
P90 ~ P97  
PB0 ~ PB7  
PC0 ~ PC7  
INT0  
I/O  
PORT 8 can be INPUT or OUTPUT port each bit.  
Shared with LCD Segment signal.  
PORT 9 can be INPUT or OUTPUT port each bit.  
Shared with LCD Segment signal.  
PORT B can be INPUT or OUTPUT port each bit.  
Shared with LCD Segment signal.  
PORT C can be INPUT or OUTPUT port each bit.  
Shared with LCD Segment signal.  
I/O  
I/O  
I/O  
PORT70..73  
Interrupt sources which has the same interrupt flag. Any pin from  
PORT70 to PORT73 has a falling edge signal, it will generate a  
interruption.  
INT1  
INT2  
PORT74..76  
PORT77  
Interrupt sources which has the same interrupt flag. Any pin from  
PORT74 to PORT76 has a falling edge signal, it will generate a  
interruption.  
Interrupt source. Once PORT77 has a falling edge or rising edge  
signal (controlled by CONT register), it will generate a interruption.  
Low reset  
/RESET  
X2OUT  
CA-1  
I
O
O
System clock output.  
CA-1 is used as address line to select low-order data (8 bits, through  
CD0~CD7) or high-order data (5 bits, through CD0~CD4)  
ERS=1 => CA-1 NO USE  
ERS=0 => CA-1=0 HIGH ORDER DATA  
CA-1=1 LOW ORDER DATA  
ERS  
I
Input pin used to select the external ROM data bus through bus  
CD0~D12 or CD0~CD7 only.  
CD0~CD7.  
HIGH/LOW = CD0~CD12 /  
CA0~CA14  
O
Program code address bus. CA0~CA14 are address output pins for  
external programming ROM access.  
CD0~CD12  
IRSEL  
I
O
Data access in terms of CA0 ~ CA12 addressing.  
IRSEL is an output pin used to select an external EVEN/ODD  
ROM.  
INSEND  
/HOLD  
O
I
Used to indicate the instruction completion and ready for next  
instruction.  
Microcontroller hold request.  
______________________________________________________________________________________________________________________________________________________  
* This specification is subject to change without notice.  
8/1/2004 (V3.1)  
60  
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