EM78808
8-bit Micro-controller
Tone1/Tone2 signal strength (root mean square voltage)
mV
mV
Tone1 signal strength V1rms (ps1)
Tone2 signal strength V2rms (ps1)
130 155 180
1.259V1rms
-2
Tone twist
(Tone1 – Tone2) twist
Tone frequency deviation
Frequency deviation
dB
%
±1
(ps1) : V1rms and V2rms has 2 dB difference. It means 20log(V2rms/V1rms) = 20log1.259 = 2 (dB)
(DED AC Characteristic)(Vdd=+5.0V,Ta=+25℃)
CHARACTERISTIC
Input sensitivity TIP and RING for DED, DEDTHD bit=0
Input sensitivity TIP and RING for DED, DEDTHD bit=1
MIN
TYP
-45
-35
MAX
--
--
UNIT
dBm
dBm
Timing characteristic (Vdd=5V,Ta=+25°C)
Description
Symbol Min Typ Max Unit
Oscillator timing characteristic
OSC start up
32.768kHz
3.579MHz PLL
Tosc
400 ms
10
FSK timing characteristic
Carrier detect low
Data out to Carrier det low
Power up to FSK(setup time)
End of FSK to Carrier Detect high
Tcdl
Tdoc
Tsup
Tcdh
--
--
--
10
10
15
--
14
20
20
4
ms
ns
ms
ms
CW timing characteristic
CAS input signal length
Tcasi
80
ms
(2130 ,2750 Hz @ -20dBm )
Call waiting data detect delay time
Call waiting data release time
Tcwd
Tcwr
42
26
ms
ms
DTMF receiver timing characteristic
Tone Present Detection Time
the guard-times for tone-present
(C=0.1uF, R=300K)
Tdp
Tgtp
(ps1)
30
ms
the guard-times for tone-absent
(C=0.1uF, R=300K)
Tgta
30
mS
Propagation Delay (St to Q)
Tone Absent Detection Time
Tpq
Tda
8
us
ms
(ps2)
SPI timing characteristic (CPU clock 3.58MHz and Fsco = 3.58Mhz /2)
/SS set-up time
/SS hold time
SCLK high time
SCLK low time
SCLK rising time
SCLK falling time
SDI set-up time to the reading edge of SCLK
SDI hold time to the reading edge of SCLK
SDO disable time
Tcss
Tcsh
Thi
Tlo
Tr
560
250
250
250
ns
ns
ns
ns
ns
ns
ns
15
15
30
30
Tf
Tisu
Tihd
Tdis
25
25
560 ns
(ps1) : Controlled by software
(ps2) : Controlled by RC circuit.
______________________________________________________________________________________________________________________________________________________
* This specification is subject to change without notice.
8/1/2004 (V3.1)
52