EM78156E
8-Bit Microcontroller with MASK ROM
Address
R PAGE registers
IOC PAGE registers
00
R0
R1
R2
R3
R4
R5
R6
(IAR)
(TCC)
(PC)
Reserve
01
02
03
04
05
06
07
08
09
0A
0B
0C
0D
0E
0F
CONT
(Control Register)
Reserve
(Status)
(RSR)
(Port5)
(Port6)
Reserve
Reserve
IOC5
IOC6
(I/O Port Control Register)
(I/O Port Control Register)
Reserve
Reserve
Reserve
Reserve
Reserve
Reserve
Reserve
IOCA
IOCB
IOCC
IOCD
IOCE
IOCF
(Prescaler Control Register)
(Pull-down Register)
(Open-drain Control)
(Pull-high Control Register)
(WDT Control Register)
(Interrupt Mask Register)
Reserve
Reserve
Reserve
Reserve
RF
(Interrupt Status)
10
3F
General Registers
Fig. 4 Data Memory Configuration
4.1.4 R3 (Status Register)
7
6
5
4
3
2
1
0
GP2
GP1
GP0
T
P
Z
DC
C
Bit 0 (C) Carry flag
Bit 1 (DC) Auxiliary carry flag
Bit 2 (Z) Zero flag.
Set to "1" if the result of an arithmetic or logic operation is zero.
Bit 3 (P) Power down bit.
Set to 1 during power on or by a "WDTC" command and reset to 0 by a
"SLEP" command.
6 •
Product Specification (V1.3) 07.29.2004
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
