欢迎访问ic37.com |
会员登录 免费注册
发布采购

EM73PA88A 参数 Datasheet PDF下载

EM73PA88A图片预览
型号: EM73PA88A
PDF下载: 下载PDF文件 查看货源
内容描述: 4位微控制器的液晶显示器产品 [4-BIT MICRO-CONTROLLER FOR LCD PRODUCT]
分类和应用: 显示器微控制器
文件页数/大小: 45 页 / 410 K
品牌: ELAN [ ELAN MICROELECTRONICS CORP ]
 浏览型号EM73PA88A的Datasheet PDF文件第1页浏览型号EM73PA88A的Datasheet PDF文件第2页浏览型号EM73PA88A的Datasheet PDF文件第3页浏览型号EM73PA88A的Datasheet PDF文件第4页浏览型号EM73PA88A的Datasheet PDF文件第6页浏览型号EM73PA88A的Datasheet PDF文件第7页浏览型号EM73PA88A的Datasheet PDF文件第8页浏览型号EM73PA88A的Datasheet PDF文件第9页  
EM73PA88A  
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT  
PIN DESCRIPTIONS  
Symbol  
Pin-type  
Function  
VDD  
Power supply (+).  
Power supply (+) for programming OTP.  
Power supply (+).  
Power supply (-).  
VDD2  
VSS  
Power supply (-) for programming OTP.  
System reset input signal, low active.  
Reset input signal for programming OTP.  
Always internal pull-up.  
RESET  
RESET-A  
OSC-G  
CLK  
Capacitor connecting pin for internal high frequency oscillator.  
LXIN  
LXOUT  
OSC-B/OSC-H Crystal or RC osc connecting pin for low speed clock source.  
OSC-B  
Crystal osc connecting pin for low speed clock source.  
4-bit input port with IDLE/STOP releasing function  
P0(0..3)/WAKEUP0..3 INPUT-B  
P0.0/ACLK : address counter clock for programming OTP.  
P0.1/PGMB : program data to OTP cells for programming OTP.  
P0.2/OEB : data output enable for programming OTP.  
P0.3/DCLK : data in/out clock signal for programming OTP.  
mask option :  
wakeup enable, pull-up  
wakeup enable, none  
wakeup disable, pull-up  
wakeup disable, pull-down  
wakeup disable, none  
P4(0..3)  
I/O-O  
4-bit bidirection I/O port with high current source.  
mask option :  
open-drain  
push-pull, high current PMOS  
push-pull, low current PMOS  
P8.0(INT1)/WAKEUPA I/O-L  
P8.2(INT0)/WAKEUPC  
2-bit bidirection I/O port with external interrupt sources input and IDLE  
/STOP releasing function.  
P8.0/DIN : data input for programming OTP.  
mask option :  
wakeup enable, push-pull  
wakeup disable, push-pull  
wakeup disable, open-drain  
P8.1(TRGB)/WAKEUPB I/O-L  
P8.3(TRGA)/WAKEUPD  
2-bit bidirection I/O port with time/counter A,B external input and IDLE  
/STOP releasing function.  
P8.1/DOUT : data output for programming OTP.  
mask option :  
wakeup enable, push-pull  
wakeup disable, push-pull  
wakeup disable, open-drain  
BZ1  
BZ2  
Tone / Speech PWM / D/A output pin.  
Tone / Speech PWM output pin.  
LCD bias pins.  
V1, V2, V3, V4, V5,  
VA, VB  
COM0~COM15  
SEG0~SEG63  
TEST/VPP  
LCD common output pins.  
LCD segment output pins.  
Test pin must be floating.  
VPP : high voltage (12V) power source for programming OTP.  
* This specification are subject to be changed without notice.  
10.8.2001  
5