EM73PA88A
4-BIT MICRO-CONTROLLER FOR LCD PRODUCT
Mnemonic
Object code ( binary ) Operation description
Byte
Cycle
Flag
C
C
-
C
-
Z
S
CMPAM
0111 0011
RAM[HL] - Acc
1
2
1
2
1
2
1
2
Z
Z
Z
Z
Z'
C
Z'
C
CMPH #k 0110 1110 1011 kkkk k - HR
CMPIA #k 1011 kkkk k - Acc
CMPL #k 0110 1110 0011 kkkk k-LR
(8) Bit manipulation
Mnemonic
Object code ( binary ) Operation description
Byte
Cycle
Flag
C
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Z
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
S
1
1
1
1
1
1
1
1
*
*
*
*
*
*
*
CLM
CLP
CLPL
CLR
SEM
SEP
SEPL
SET
TF
TFA
TFM
TFP
TFPL
TT
b
1111 00bb
RAM[HL]b←0
PORT[p]b←0
PORT[LR3-2+4]LR1-0←0
RAM[y]b←0
RAM[HL]b←1
PORT[p]b←1
PORT[LR3-2+4]LRl-0←1
RAM[y]b←1
SF←RAM[y]b'
SF←Accb'
SF←RAM[HL]b'
SF←PORT[p]b'
SF←PORT[LR 3-2 +4]LR1-0'
SF←RAM[y]b
1
2
1
2
1
2
1
2
2
1
1
2
1
2
2
1
2
2
2
1
2
2
2
2
1
1
2
2
2
2
p,b 0110 1101 11bb pppp
0110 0000
y,b 0110 1100 11bb yyyy
b
1111 01bb
p,b 0110 1101 01bb pppp
0110 0010
y,b 0110 1100 01bb yyyy
y,b 0110 1100 00bb yyyy
b
b
p,b 0110 1101 00bb pppp
0110 0001
y,b 0110 1100 10bb yyyy
p,b 0110 1101 10bb pppp
1111 10bb
1111 11bb
TTP
SF←PORT[p]b
(9) Subroutine
Mnemonic
LCALL a
Object code ( binary ) Operation description
Byte
Cycle
Flag
C
-
Z
-
S
-
0100 0aaa aaaa aaaa
1110 nnnn
STACK[SP]←PC,
SP←SP -1, PC←a
STACK[SP]←PC,
2
1
2
2
SCALL a
-
-
-
-
-
-
SP←SP - 1, PC←a, a = 8n + 6
(n =1 15),0086h (n = 0)
SP←SP + 1, PC←STACK[SP]
RET
0100 1111
1
2
(10) Input/output
Mnemonic
Object code ( binary ) Operation description
Byte
Cycle
Flag
C
-
-
-
-
Z
Z
-
-
-
S
INA
INM
p
p
0110 1111 0100 pppp
0110 1111 1100 pppp
Acc←PORT[p]
RAM[HL]←PORT[p]
PORT[p]←k
PORT[p]←Acc
PORT[p]←RAM[HL]
2
2
2
2
2
2
2
2
2
2
Z'
Z'
1
1
1
OUT #k,p 0100 1010 kkkk pppp
OUTA p
OUTM p
0110 1111 000p pppp
0110 1111 100p pppp
-
-
* This specification are subject to be changed without notice.
10.8.2001
43
ELAN [ ELAN MICROELECTRONICS CORP ]
