EM65570
68COM/ 98SEG 65K Color STN LCD Driver
7.20.2 Vop Calibration Offset Examples
Program
If the desired Vop calibration offset is +30, CV5~CV0 is set to 011110. The example
code is shown below:
WRITE #F4H
WRITE #71H
WRITE #6EH
WRITE #A1H
WRITE #52H
// set RE FLAG 100 Æ INSTRUCTION Bank 4
// set CV5~CV4=01
// set CV3~CV0=1110
// set NIB1~NIB0=01 Æ program CV5~CV4
// set EEPROM operating mode Æ programming;
ROM power is from internal V0
DELAY > 4 MS
WRITE #56H
WRITE #A0H
WRITE #52H
// wait > 4 ms to finish programming
// setEEPROMmodeÆ reserve(finishprogramming)
// set NIB1~NIB0=00 Æ program CV3~CV0
// set EEPROM operating mode Æ programming;
EEPROM power is from internal V0
DELAY > 4 MS
WRITE #56H
WRITE #F0H
WRITE #91H
WRITE #F4H
WRITE #A1H
WRITE #50H
// wait > 4 ms to finish programming
// setEEPROMmodeÆ reserve(finishprogramming)
// set RE FLAG 000 Æ INSTRUCTION Bank 0
// EM65570 reset
// set RE FLAG 100 Æ INSTRUCTION Bank 4
// set NIB1~NIB0=01 Æ read CV5~CV4
// set EEPROM operating mode Æ reading; read data
from EEPROM to the CV5~CV4 registers
DELAY >10 uS
WRITE #56H
// wait >10 uS to finish reading
// set EEPROM mode Æ reserve (finish reading data
from EEPROM to the CV5~CV4 registers)
WRITE #A0H
WRITE #50H
// set NIB1~NIB0=00 Æ read CV3~CV0
// set EEPROM operating mode Æ reading; read data
from EEPROM to the CV3~CV0 registers
DELAY >10 uS
WRITE #56H
// wait >10 uS to finish reading
// set EEPROM mode Æ reserve (finish reading data
from EEPROM to the CV3~CV0 registers)
NOTE
When setting CV5~CV0, you must set CV5~CV4 (upper nibble registers) first,
then set CV3~CV0 (lower nibble registers), and then start to program.
The programming sequence of CV5~CV4 and CV3~CV0 is not restricted.
Product Specification (V1.0) 09.05.2005
• 43
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
