EM65570
68COM/ 98SEG 65K Color STN LCD Driver
7.10 Gradation LSB Control
In 256-color mode (C256=1), the EM65570 provides segment driver output for 8-
gradation display using 3 bits. For 4-gradation display, 2 bits are used.
The segment driver output for the 4-gradation display uses 2 bits to write to the
corresponding RAM area and additional 1 bit supplemented by the gradation LSB
circuit, and then it selects 4-gradation from the 8-gradation.
In 256-color mode (C256=1), the segment driver output for the 4-gradation display will
result in a gradation level of “0” regardless of the gradation LSB when 2 bits of data on
the display RAM are “00”. When 2 bits of data on the display RAM is “11,” a gradation
level of 7/7 is selected regardless of the bit information of the gradation LSB. The other
gradation levels are selected depending on 2 bits of data on the display RAM and the
gradation LSB bits.
One bit of data is supplemented by setting the gradation LSB register (GLSB).
The Gradation LSB control bit applies to all 4-gradation segment drivers.
Gradation LSB = “0”: Selects 0 as the LSB information on the RAM for 4-gradation
segment drivers.
Gradation LSB = “1”: Selects 1 as the LSB information on the RAM for 4-gradation
segment drivers.
7.11 Display Timing Circuit
The display timing circuit generates internal signals and timing pulses (internal LP,
FLM, M) by clock.
Symbol
Description
The LP is latch clock signal.
LP (internal)
At the raising edge, count the display line counter. At the falling edge output
the LCD drive signal.
The signal for the LCD display synchronous signals (first line maker).
When FLM is set to “H,” the display start-line address is present.
FLM (internal)
M (internal)
The signal for alternated signals of LCD drive output.
Product Specification (V1.0) 09.05.2005
• 33
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
