EM65101
128COM/160SEG 16 Gray Scale Level LCD Driver
7.13.1 EEPROM Program, Read, and Erase Flow Charts
The following are the EEPROM Program, Read and Erase flow charts for achieving
correct Vop offset voltage.
set
C V 5~C V 4
(up nibble
register)
select EEPR O M
address to read
(N IB 1,N IB 0) set 00
W R start :
(M 1,M 0) set 01
set
R D start :
(M 1,M 0) set 00
delay > 4 m s
C V 3~C V 0
(low nibble
register)
W R end:
(M 1,M 0) set 11
delay > 10 us
select EE PR O M
address to program
(N IB 1,N IB 0) set 01
R eset
R D end:
(M 1,M 0) set 11
W R start :
(M 1,M 0) set 01
select EEPR O M
address to read
(N IB 1,N IB 0) set 01
Get correct
V op offset
voltage
delay > 4 m s
R D start :
(M 1,M 0) set 00
W R end:
(M 1,M 0) set 11
delay > 10 us
select EE PR O M
address to program
(N IB 1,N IB 0) set 00
R D end:
(M 1,M 0) set 11
Figure 7-13 Program Flow Chart
28 •
Product Specification (V0.4) 08.15.2005
(This specification is subject to change without further notice)
ELAN [ ELAN MICROELECTRONICS CORP ]
