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EDS2532CABJ-75L-E 参数 Datasheet PDF下载

EDS2532CABJ-75L-E图片预览
型号: EDS2532CABJ-75L-E
PDF下载: 下载PDF文件 查看货源
内容描述: 256M位的SDRAM [256M bits SDRAM]
分类和应用: 存储内存集成电路动态存储器时钟
文件页数/大小: 48 页 / 637 K
品牌: ELPIDA [ ELPIDA MEMORY ]
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EDS2532CABJ  
Row address strobe and bank activate [ACT]  
This command activates the bank that is selected by BA0, BA1 and determines the row address (A0 to A11). (See  
Bank Select Signal Table)  
Precharge selected bank [PRE]  
This command starts precharge operation for the bank selected by BA0, BA1. (See Bank Select Signal Table)  
[Bank Select Signal Table]  
BA0  
L
BA1  
L
Bank 0  
Bank 1  
H
L
Bank 2  
L
H
Bank 3  
H
H
Remark: H: VIH. L: VIL.  
Precharge all banks [PALL]  
This command starts a precharge operation for all banks.  
Refresh [REF/SELF]  
This command starts the refresh operation. There are two types of refresh operation, the one is auto-refresh, and  
the other is self-refresh. For details, refer to the CKE truth table section.  
Mode register set [MRS]  
The SDRAM has a mode register that defines how it operates. The mode register is specified by the address pins  
(A0 to BA0 and BA1) at the mode register set cycle. For details, refer to the mode register configuration. After  
power on, the contents of the mode register are undefined, execute the mode register set command to set up the  
mode register.  
Data Sheet E0460E40 (Ver. 4.0)  
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