EDD51323DBH-LS
Deep Power-Down Exit*
CK
/CK
Clock cycle is necessary
VIH
CKE
tMRD
tMRD
2 refresh cycles are necessary
/CS
/RAS
/CAS
/WE
BA0
BA1
A10
Address key
Address key
Address
DM
DQ
High-Z
200µs
tRP
tRFC
tRFC
Deep
Power Down
Exit
Precharge
All Banks
Command
is necessary
Mode
Register Set
Command
Extended
Mode
Register Set
Command
is necessary
CBR (Auto)
Refresh
Command
is necessary
CBR (Auto)
Activate
Command
Refresh
Command
is necessary
Command
is necessary
= Don't care
Note: The sequence of auto-refresh, mode register programming and extended mode register programming above
may be transposed.
Preliminary Data Sheet E1432E20 (Ver. 2.0)
56