EBE51RD8AJFA
DM (input pins)
DM is the reference signal of the data input mask function. DMs are sampled at the cross point of DQS and /DQS.
DM function will be disabled when RDQS (DQS9 toDQS17 and /DQS9 to /DQS17) function is enabled by EMRS.
VDD (power supply pins)
1.8V is applied. (VDD is for the internal circuit.)
VDDSPD (power supply pin)
1.8V is applied (For serial EEPROM).
VSS (power supply pin)
Ground is connected.
/RESET(input pin)
LVCMOS reset input. When /RESET is Low, all registers are reset.
Par_IN (Parity input pin)
Parity bit for the address and control bus.
/Err_Out (Error output pin)
Parity error found on the address and control bus.
Detailed Operation Part and Timing Waveforms
Refer to the EDE5104AJSE, EDE5108AJSE, EDE5116AJSE datasheet (E1043E). DIMM /CAS latency =
component CL + 1 for registered type.
Data Sheet E1036E30 (Ver. 3.0)
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ELPIDA [ ELPIDA MEMORY ]
