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EBE42FE8ACFR-6E-E 参数 Datasheet PDF下载

EBE42FE8ACFR-6E-E图片预览
型号: EBE42FE8ACFR-6E-E
PDF下载: 下载PDF文件 查看货源
内容描述: 4GB全缓冲DIMM [4GB Fully Buffered DIMM]
分类和应用: 存储内存集成电路动态存储器双倍数据速率时钟
文件页数/大小: 22 页 / 246 K
品牌: ELPIDA [ ELPIDA MEMORY ]
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EBE42FE8ACFR  
Electrical Specifications  
All voltages are referenced to VSS (GND).  
Absolute Maximum Ratings  
Parameter  
Symbol  
VIN/VOUT  
VCC  
Value  
Unit  
Note  
Voltage on any pin relative to VSS  
AMB core power voltage relative to VSS  
–0.3 to +1.75  
–0.3 to +1.75  
–0.5 to +2.30  
–0.5 to +2.30  
–55 to +100  
V
V
DRAM interface power voltage relative to VSS VDD  
V
Termination voltage relative to VSS  
Storage temperature  
VTT  
Tstg  
V
°C  
Caution  
Exposing the device to stress above those listed in Absolute Maximum Ratings could cause  
permanent damage. The device is not meant to be operated under conditions outside the limits  
described in the operational section of this specification. Exposure to Absolute Maximum Rating  
conditions for extended periods may affect device reliability.  
Operating Temperature Conditions  
Parameter  
Symbol  
Value  
0 to +95  
110  
Unit  
°C  
Note  
1
SDRAM component case temperature  
AMB component case temperature  
TC_DRAM  
TC_AMB  
°C  
Note: 1. Supporting 0°C to +85°C and being able to extend to +95°C with doubling auto-refresh commands in  
frequency to a 32ms period (tREFI = 3.9µs) and higher temperature self-refresh entry via the control of  
EMRS (2) bit A7 is required.  
DC Operating Conditions  
Parameter  
Symbol  
VCC  
min.  
1.455  
1.7  
typ.  
1.50  
1.8  
max.  
Unit  
V
Note  
AMB supply voltage  
1.575  
DDR2 SDRAM supply voltage VDD  
1.9  
V
Input termination voltage  
EEPROM supply voltage  
SPD input high voltage  
SPD input low voltage  
RESET input high voltage  
RESET input low voltage  
Leakage current (RESET)  
Leakage current (link)  
VTT  
0.48 × VDD 0.50 × VDD  
0.52 × VDD  
V
VDDSPD  
VIH (DC)  
VIL (DC)  
VIH (DC)  
VIL (DC)  
IL  
3.0  
2.1  
3.3  
3.6  
V
VDDSPD  
V
1
1
2
2
2
3
0.8  
0.5  
90  
5
V
1.0  
V
V
–90  
–5  
µA  
µA  
IL  
Notes: 1. Applies for SMB and SPD bus signals.  
2. Applies for AMB CMOS signal /RESET.  
3. For all other AMB related DC parameters, please refer to the high-speed differential link interface  
specification.  
Data Sheet E1328E30 (Ver. 3.0)  
10  
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