EBE21UE8ACUA
DC Characteristics 1 (TC = 0°C to +85°C, VDD = 1.8V ± 0.1V, VSS = 0V)
Parameter
Symbol Grade
max.
Unit
mA
Test condition
Operating current
(ACT-PRE)
(Another rank is in IDD2P)
-8E, -8G
-6E
760
720
one bank; tCK = tCK (IDD), tRC = tRC (IDD),
tRAS = tRAS min.(IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
IDD0
IDD0
Operating current
(ACT-PRE)
(Another rank is in IDD3N)
-8E, -8G
-6E
1400
1280
mA
mA
one bank; IOUT = 0mA;
BL = 4, CL = CL(IDD), AL = 0;
Operating current
-8E, -8G
-6E
880
840
IDD1
IDD1
(ACT-READ-PRE)
(Another rank is in IDD2P)
tCK = tCK (IDD), tRC = tRC (IDD),
tRAS = tRAS min.(IDD); tRCD = tRCD (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data pattern is same as IDD4W
Operating current
-8E, -8G
-6E
1520
1400
mA
mA
(ACT-READ-PRE)
(Another rank is in IDD3N)
all banks idle;
tCK = tCK (IDD);
CKE is L;
Other control and address bus inputs are STABLE;
Data bus inputs are FLOATING
Precharge power-down
standby current
IDD2P
IDD2Q
IDD2N
160
all banks idle;
tCK = tCK (IDD);
CKE is H, /CS is H;
Other control and address bus inputs are STABLE;
Data bus inputs are FLOATING
Precharge quiet standby
current
-8E, -8G
-6E
560
480
mA
mA
all banks idle;
tCK = tCK (IDD);
CKE is H, /CS is H;
Other control and address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
-8E, -8G
-6E
640
560
Idle standby current
all banks open;
Fast PDN Exit
tCK = tCK (IDD);
MRS(12) = 0
CKE is L;
IDD3P-F
IDD3P-S
560
320
mA
mA
Active power-down
standby current
Other control and address bus
Slow PDN Exit
MRS(12) = 1
inputs are STABLE;
Data bus inputs are FLOATING
all banks open;
tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD);
CKE is H, /CS is H between valid commands;
Other control and address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
-8E, -8G
-6E
1440
1280
Active standby current
IDD3N
mA
Operating current
all banks open, continuous burst reads, IOUT = 0mA;
BL = 4, CL = CL(IDD), AL = 0;
tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
-8E, -8G
-6E
1360
1200
IDD4R
IDD4R
mA
mA
(Burst read operating)
(Another rank is in IDD2P)
Operating current
-8E, -8G
-6E
2000
1760
(Burst read operating)
(Another rank is in IDD3N)
Data pattern is same as IDD4W
Operating current
all banks open, continuous burst writes;
BL = 4, CL = CL(IDD), AL = 0;
tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
-8E, -8G
-6E
1360
1200
IDD4W
IDD4W
mA
mA
(Burst write operating)
(Another rank is in IDD2P)
Operating current
-8E, -8G
-6E
2000
1760
(Burst write operating)
(Another rank is in IDD3N)
Data Sheet E1217E10 (Ver. 1.0)
11
ELPIDA [ ELPIDA MEMORY ]
