EBE11UE6ACUA
-8E
-8G
-6E
DDR2-667 (5-5-5)
Speed bin
Parameter
DDR2-800 (5-5-5)
DDR2-800 (6-6-6)
Symbol
tDSH
min.
0.2
max.
min.
0.2
max.
min.
0.2
max.
Unit Notes
DQS falling edge hold time from
CK
tCK
(avg)
Mode register set command cycle
time
tMRD
2
2
2
nCK
tCK
Write postamble
Write preamble
tWPST
tWPRE
0.4
0.35
0.6
0.4
0.6
0.4
0.6
(avg)
tCK
(avg)
ps
0.35
250
175
0.35
275
200
Address and control input hold time tIH (base) 250
5
4
Address and control input setup
tIS (base) 175
time
ps
tCK
Read preamble
tRPRE
0.9
1.1
0.9
0.4
1.1
0.9
0.4
1.1
11
12
(avg)
tCK
(avg)
Read postamble
tRPST
0.4
0.6
0.6
0.6
Active to precharge command
Active to auto-precharge delay
tRAS
tRAP
45
70000
45
70000
45
70000
ns
tRCD min.
tRCD min.
tRCD min.
ns
Active bank A to active bank B
command period
tRRD
10
10
10
ns
Four active window period
/CAS to /CAS command delay
Write recovery time
tFAW
tCCD
tWR
45
2
45
2
50
2
ns
nCK
ns
15
15
15
WR +
RU (tRP/
tCK (avg))
WR +
RU (tRP/
tCK (avg))
WR +
RU (tRP/
tCK (avg))
Auto precharge write recovery +
precharge time
tDAL
nCK 1, 9
Internal write to read command
delay
Internal read to precharge
command delay
tWTR
tRTP
7.5
7.5
7.5
ns
7.5
7.5
7.5
ns
Exit self-refresh to a non-read
command
Exit self-refresh to a read
command
Exit precharge power down to any
non-read command
tXSNR
tXSRD
tXP
tRFC + 10
tRFC + 10
tRFC + 10
ns
200
2
200
2
200
2
nCK
nCK
Exit active power down to read
command
tXARD
2
2
2
nCK 3
Exit active power down to read
command
(slow exit/low power mode)
tXARDS 8 − AL
8 − AL
7 − AL
nCK 2, 3
CKE minimum pulse width (high
tCKE
3
0
0
3
0
0
3
0
0
nCK
ns
and low pulse width)
Output impedance test driver delay tOIT
MRS command to ODT update
delay
12
12
12
12
12
12
tMOD
ns
Auto-refresh to active/auto-refresh
command time
tRFC
127.5
127.5
127.5
ns
Average periodic refresh interval
tREFI
tREFI
7.8
3.9
7.8
3.9
7.8
3.9
µs
µs
(0°C ≤ TC ≤ +85°C)
(+85°C < TC ≤ +95°C)
Minimum time clocks remains ON
after CKE asynchronously drops
low
tIS +
tIS +
tCK(avg)
+ tIH
tIS +
tCK(avg)
+ tIH
tDELAY tCK(avg)
ns
+ tIH
Data Sheet E1216E10 (Ver. 1.0)
17