EBE11UD8AGWA
DC Characteristics 1 (TC = 0°C to +85°C, VDD = 1.8V ± 0.1V, VSS = 0V)
Parameter
Symbol Grade
max.
Unit
mA
Test condition
Operating current
(ACT-PRE)
(Another rank is in IDD2P)
-6E
IDD0
1000
960
one bank; tCK = tCK (IDD), tRC = tRC (IDD),
tRAS = tRAS min.(IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
-5C
Operating current
(ACT-PRE)
(Another rank is in IDD3N)
-6E
IDD0
1480
1400
mA
mA
-5C
one bank; IOUT = 0mA;
BL = 4, CL = CL(IDD), AL = 0;
Operating current
-6E
IDD1
1120
1080
(ACT-READ-PRE)
(Another rank is in IDD2P)
-5C
tCK = tCK (IDD), tRC = tRC (IDD),
tRAS = tRAS min.(IDD); tRCD = tRCD (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data pattern is same as IDD4W
Operating current
-6E
IDD1
1600
1520
mA
mA
(ACT-READ-PRE)
(Another rank is in IDD3N)
-5C
all banks idle;
tCK = tCK (IDD);
CKE is L;
Other control and address bus inputs are STABLE;
Data bus inputs are FLOATING
Precharge power-down
standby current
-6E
IDD2P
160
160
-5C
all banks idle;
tCK = tCK (IDD);
CKE is H, /CS is H;
Other control and address bus inputs are STABLE;
Data bus inputs are FLOATING
Precharge quiet standby
current
-6E
IDD2Q
400
400
mA
mA
-5C
all banks idle;
tCK = tCK (IDD);
CKE is H, /CS is H;
Other control and address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
-6E
IDD2N
560
480
Idle standby current
-5C
all banks open;
Fast PDN Exit
tCK = tCK (IDD);
MRS(12) = 0
CKE is L;
-6E
IDD3P-F
-5C
640
640
mA
mA
Active power-down
standby current
Other control and address bus
-6E
IDD3P-S
-5C
400
400
Slow PDN Exit
MRS(12) = 1
inputs are STABLE;
Data bus inputs are FLOATING
all banks open;
tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD);
CKE is H, /CS is H between valid commands;
Other control and address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
-6E
IDD3N
1120
1040
Active standby current
mA
-5C
Operating current
all banks open, continuous burst reads, IOUT = 0mA;
BL = 4, CL = CL(IDD), AL = 0;
tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
-6E
IDD4R
1920
1600
mA
mA
mA
mA
(Burst read operating)
(Another rank is in IDD2P)
-5C
Operating current
-6E
IDD4R
2400
2040
(Burst read operating)
(Another rank is in IDD3N)
-5C
Data pattern is same as IDD4W
Operating current
all banks open, continuous burst writes;
BL = 4, CL = CL(IDD), AL = 0;
tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
-6E
IDD4W
1840
1600
(Burst write operating)
(Another rank is in IDD2P)
-5C
Operating current
-6E
IDD4W
2320
2040
(Burst write operating)
(Another rank is in IDD3N)
-5C
tCK = tCK (IDD);
Auto-refresh current
(Another rank is in IDD2P)
-6E
IDD5
2240
2080
mA
mA
Refresh command at every tRFC (IDD) interval;
CKE is H, /CS is H between valid commands;
Other control and address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
-5C
Auto-refresh current
(Another rank is in IDD3N)
-6E
IDD5
2720
2520
-5C
Preliminary Data Sheet E0919E10 (Ver. 1.0)
11
ELPIDA [ ELPIDA MEMORY ]
