EBE11UD8AESA
DC Characteristics 1 (TC = 0°C to +85°C, VDD = 1.8V ± 0.1V)
Parameter
Symbol Grade
-6E
max.
Unit
Test condition
Operating current
(ACT-PRE)
(Another rank is in IDD2P)
1000
960
824
one bank; tCK = tCK (IDD), tRC = tRC (IDD),
tRAS = tRAS min.(IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
IDD0
-5C
-4A
mA
Operating current
(ACT-PRE)
(Another rank is in IDD3N)
-6E
-5C
-4A
1480
1400
1240
IDD0
mA
mA
one bank; IOUT = 0mA;
BL = 4, CL = CL(IDD), AL = 0;
Operating current
-6E
-5C
-4A
1120
1080
944
IDD1
IDD1
(ACT-READ-PRE)
(Another rank is in IDD2P)
tCK = tCK (IDD), tRC = tRC (IDD),
tRAS = tRAS min.(IDD); tRCD = tRCD (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data pattern is same as IDD4W
Operating current
-6E
-5C
-4A
1600
1520
1360
mA
mA
(ACT-READ-PRE)
(Another rank is in IDD3N)
all banks idle;
tCK = tCK (IDD);
CKE is L;
Other control and address bus inputs are STABLE;
Data bus inputs are FLOATING
160
128
Precharge power-down
standby current
-6E, -5C
-4A
IDD2P
IDD2Q
all banks idle;
tCK = tCK (IDD);
CKE is H, /CS is H;
Other control and address bus inputs are STABLE;
Data bus inputs are FLOATING
400
320
Precharge quiet standby
current
-6E, -5C
-4A
mA
mA
all banks idle;
tCK = tCK (IDD);
CKE is H, /CS is H;
Other control and address bus inputs are
SWITCHING;
-6E
-5C
-4A
560
480
400
Idle standby current
IDD2N
Data bus inputs are SWITCHING
all banks open;
640
560
-6E, -5C
-4A
tCK = tCK (IDD);
CKE is L;
Other control and
address bus inputs
are STABLE;
Fast PDN Exit
MRS(12) = 0
IDD3P-F
IDD3P-S
mA
mA
Active power-down
standby current
400
320
-6E, -5C
-4A
Slow PDN Exit
MRS(12) = 1
Data bus inputs are
FLOATING
all banks open;
tCK = tCK (IDD), tRAS = tRAS max.(IDD),
tRP = tRP (IDD);
CKE is H, /CS is H between valid commands;
Other control and address bus inputs are
SWITCHING;
-6E
-5C
-4A
1120
1040
960
Active standby current
IDD3N
mA
Data bus inputs are SWITCHING
all banks open, continuous burst reads, IOUT =
0mA;
BL = 4, CL = CL(IDD), AL = 0;
tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP =
tRP (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data pattern is same as IDD4W
Operating current
-6E
-5C
-4A
1920
1600
1264
IDD4R
IDD4R
mA
mA
(Burst read operating)
(Another rank is in IDD2P)
Operating current
-6E
-5C
-4A
2400
2040
1680
(Burst read operating)
(Another rank is in IDD3N)
all banks open, continuous burst writes;
BL = 4, CL = CL(IDD), AL = 0;
tCK = tCK (IDD), tRAS = tRAS max.(IDD),
tRP = tRP (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
Operating current
-6E
IDD4W -5C
-4A
1840
1600
1264
mA
mA
(Burst write operating)
(Another rank is in IDD2P)
Operating current
-6E
IDD4W -5C
-4A
2320
2040
1680
(Burst write operating)
(Another rank is in IDD3N)
Data Sheet E0589E30 (Ver. 3.0)
10
ELPIDA [ ELPIDA MEMORY ]
