EBE11UD8AGFA
DC Characteristics 1 (TC = 0°C to +85°C, VDD = 1.8V ± 0.1V, VSS = 0V)
Parameter
Symbol Grade
-6E
max.
Unit
mA
Test condition
Operating current
(ACT-PRE)
(Another rank is in IDD2P)
1000
960
824
one bank; tCK = tCK (IDD), tRC = tRC (IDD),
tRAS = tRAS min.(IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
IDD0
-5C
-4A
Operating current
(ACT-PRE)
(Another rank is in IDD3N)
-6E
-5C
-4A
1480
1400
1240
IDD0
mA
mA
one bank; IOUT = 0mA;
BL = 4, CL = CL(IDD), AL = 0;
Operating current
-6E
-5C
-4A
1120
1080
944
IDD1
IDD1
(ACT-READ-PRE)
(Another rank is in IDD2P)
tCK = tCK (IDD), tRC = tRC (IDD),
tRAS = tRAS min.(IDD); tRCD = tRCD (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data pattern is same as IDD4W
Operating current
-6E
-5C
-4A
1600
1520
1360
mA
mA
(ACT-READ-PRE)
(Another rank is in IDD3N)
all banks idle;
tCK = tCK (IDD);
CKE is L;
Other control and address bus inputs are STABLE;
Data bus inputs are FLOATING
-6E
-5C
-4A
160
160
128
Precharge power-down
standby current
IDD2P
all banks idle;
-6E
IDD2Q -5C
-4A
400
400
320
tCK = tCK (IDD);
CKE is H, /CS is H;
Other control and address bus inputs are STABLE;
Data bus inputs are FLOATING
Precharge quiet standby
current
mA
mA
all banks idle;
tCK = tCK (IDD);
CKE is H, /CS is H;
Other control and address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
-6E
-5C
-4A
560
480
400
Idle standby current
IDD2N
-6E
IDD3P-F -5C
-4A
640
640
560
all banks open;
Fast PDN Exit
tCK = tCK (IDD);
MRS(12) = 0
CKE is L;
mA
mA
Active power-down
standby current
Other control and address bus
-6E
IDD3P-S -5C
-4A
400
400
320
Slow PDN Exit
MRS(12) = 1
inputs are STABLE;
Data bus inputs are FLOATING
all banks open;
-6E
-5C
-4A
1120
1040
960
tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD);
CKE is H, /CS is H between valid commands;
Other control and address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
Active standby current
IDD3N
mA
Operating current
-6E
-5C
-4A
1920
1600
1264
all banks open, continuous burst reads, IOUT = 0mA;
BL = 4, CL = CL(IDD), AL = 0;
tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
IDD4R
IDD4R
mA
mA
mA
mA
mA
mA
(Burst read operating)
(Another rank is in IDD2P)
Operating current
-6E
-5C
-4A
2400
2040
1680
(Burst read operating)
(Another rank is in IDD3N)
Data pattern is same as IDD4W
Operating current
-6E
IDD4W -5C
-4A
1840
1600
1264
all banks open, continuous burst writes;
BL = 4, CL = CL(IDD), AL = 0;
tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
(Burst write operating)
(Another rank is in IDD2P)
Operating current
-6E
IDD4W -5C
-4A
2320
2040
1680
(Burst write operating)
(Another rank is in IDD3N)
-6E
-5C
-4A
2240
2080
1904
Auto-refresh current
(Another rank is in IDD2P)
tCK = tCK (IDD);
IDD5
IDD5
Refresh command at every tRFC (IDD) interval;
CKE is H, /CS is H between valid commands;
Other control and address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
-6E
-5C
-4A
2720
2520
2320
Auto-refresh current
(Another rank is in IDD3N)
Data Sheet E0782E20 (Ver. 2.0)
11
ELPIDA [ ELPIDA MEMORY ]
