EBE11UD8ABFA
DC Characteristics 1 (TC = 0 to +85°C, VDD = 1.8V ± 0.1V, VSS = 0V)
Parameter
Symbol Grade
max.
Unit
mA
Test condition
Operating current
(ACT-PRE)
(Another rank is in IDD2P)
-5C
IDD0
960
824
one bank; tCK = tCK (IDD), tRC = tRC (IDD),
tRAS = tRAS min.(IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
-4A
Operating current
(ACT-PRE)
(Another rank is in IDD3N)
-5C
IDD0
1400
1240
mA
mA
-4A
one bank; IOUT = 0mA;
BL = 4, CL = CL(IDD), AL = 0;
Operating current
-5C
IDD1
1080
944
(ACT-READ-PRE)
(Another rank is in IDD2P)
-4A
tCK = tCK (IDD), tRC = tRC (IDD),
tRAS = tRAS min.(IDD); tRCD = tRCD (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data pattern is same as IDD4W
Operating current
-5C
IDD1
1520
1360
mA
mA
(ACT-READ-PRE)
(Another rank is in IDD3N)
-4A
all banks idle;
tCK = tCK (IDD);
CKE is L;
Other control and address bus inputs are STABLE;
Data bus inputs are FLOATING
-5C
-4A
IDD2P
160
128
400
320
480
400
Precharge power-down
standby current
-5C
-4A
all banks idle;
tCK = tCK (IDD);
CKE is H, /CS is H;
Other control and address bus inputs are STABLE;
Data bus inputs are FLOATING
-5C
IDD2Q
Precharge quiet standby
current
mA
mA
-4A
all banks idle;
tCK = tCK (IDD);
CKE is H, /CS is H;
Other control and address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
-5C
IDD2N
Idle standby current
-4A
all banks open;
Fast PDN Exit
tCK = tCK (IDD);
MRS(12) = 0
CKE is L;
-5C
IDD3P-F
-4A
640
560
mA
mA
Active power-down
standby current
Other control and address bus
inputs are STABLE;
-5C
400
320
Slow PDN Exit
MRS(12) = 1
IDD3P-S
Data bus inputs are FLOATING
-4A
all banks open;
-5C
IDD3N
1040
960
tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD);
CKE is H, /CS is H between valid commands;
Other control and address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
Active standby current
mA
-4A
Operating current
all banks open, continuous burst reads, IOUT = 0mA;
BL = 4, CL = CL(IDD), AL = 0;
tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
-5C
IDD4R
1600
1264
mA
mA
mA
mA
(Burst read operating)
(Another rank is in IDD2P)
-4A
Operating current
(Burst read operating)
(Another rank is in IDD3N)
-5C
IDD4R
2040
1680
-4A
Data pattern is same as IDD4W
Operating current
(Burst write operating)
(Another rank is in IDD2P)
all banks open, continuous burst writes;
BL = 4, CL = CL(IDD), AL = 0;
tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD);
CKE is H, /CS is H between valid commands;
Address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
-5C
IDD4W
1600
1264
-4A
Operating current
-5C
IDD4W
2040
1680
(Burst write operating)
(Another rank is in IDD3N)
-4A
tCK = tCK (IDD);
Auto-refresh current
(Another rank is in IDD2P)
-5C
IDD5
2080
1904
mA
mA
Refresh command at every tRFC (IDD) interval;
CKE is H, /CS is H between valid commands;
Other control and address bus inputs are SWITCHING;
Data bus inputs are SWITCHING
-4A
Auto-refresh current
(Another rank is in IDD3N)
-5C
IDD5
2520
2320
-4A
Data Sheet E0365E50 (Ver. 5.0)
11
ELPIDA [ ELPIDA MEMORY ]
