EBD11UD8ADFB
DC Characteristics 1 (TA = 0 to +70°C, VDD = 2.5V ± 0.2V, VSS = 0V)
Parameter
Symbol
IDD0
Grade
max.
Unit
mA
Test condition
Notes
1, 2, 9
-6B
-7A, -7B
1720
1520
CKE ≥ VIH,
tRC = tRC (min.)
Operating current (ACTV-PRE)
CKE ≥ VIH, BL = 4,
-6B
-7A, -7B
2120
1840
Operating current
(ACTV-READ-PRE)
IDD1
mA
CL = 2.5,
1, 2, 5
tRC = tRC (min.)
Idle power down standby current
Floating idle standby current
IDD2P
IDD2F
48
480
400
mA
mA
CKE ≤ VIL
CKE ≥ VIH, /CS ≥ VIH,
DQ, DQS, DM = VREF
4
-6B
-7A, -7B
4, 5
CKE ≥ VIH, /CS ≥ VIH,
Quiet idle standby current
IDD2Q
IDD3P
IDD3N
IDD4R
IDD4W
IDD5
320
mA
mA
mA
mA
mA
mA
mA
mA
4, 10
DQ, DQS, DM = VREF
Active power down
standby current
320
CKE ≤ VIL
3
-6B
-7A, -7B
-6B
-7A, -7B
-6B
-7A, -7B
-6B
-7A, -7B
1040
880
CKE ≥ VIH, /CS ≥ VIH
tRAS = tRAS (max.)
CKE ≥ VIH, BL = 2,
CL = 2.5
CKE ≥ VIH, BL = 2,
CL = 2.5
tRFC = tRFC (min.),
Input ≤ VIL or ≥ VIH
Active standby current
3, 5, 6
1, 2, 5, 6
1, 2, 5, 6
2520
2120
2520
2120
5120
4800
Operating current
(Burst read operation)
Operating current
(Burst write operation)
Auto refresh current
Self refresh current
Input ≥ VDD – 0.2 V
Input ≤ 0.2 V
IDD6
64
-6B
-7A, -7B
4600
3880
Operating current
(4 banks interleaving)
IDD7A
BL = 4
1, 5, 6, 7
Notes. 1. These IDD data are measured under condition that DQ pins are not connected.
2. One bank operation.
3. One bank active.
4. All banks idle.
5. Command/Address transition once per one cycle.
6. DQ, DM and DQS transition twice per one clock cycle.
7. 4 banks active. Only one bank is running at tRC = tRC (min.)
8. The IDD data on this table are measured with regard to tCK = tCK (min.) in general.
9. Command/Address transition once every two clock cycles.
10. Command/Address stable at ≥ VIH or ≤ VIL.
DC Characteristics 2 (TA = 0 to +70°C, VDD, VDDQ = 2.5V ± 0.2V, VSS = 0V)
Parameter
Symbol
ILI
min.
–32
max.
32
Unit
µA
Test condition
Note
Input leakage current
Output leakage current
Output high current
Output low current
VDD ≥ VIN ≥ VSS
VDD ≥ VOUT ≥ VSS
VOUT = 1.95V
ILO
–10
10
µA
IOH
IOL
–15.2
15.2
—
mA
mA
1
1
—
VOUT = 0.35V
Note: 1. DDR SDRAM component specification.
Pin Capacitance (TA = 25°C, VDD = 2.5V ± 0.2V)
Parameter
Symbol
CI1
Pins
max.
Unit
pF
Note
Address, /RAS, /CAS, /WE,
/CS, CKE
CK, /CK
Input capacitance
Input capacitance
Data and DQS input/output
capacitance
60
50
20
CI2
pF
CO
DQ, DQS
pF
Data Sheet E0414E20 (Ver. 2.0)
11
ELPIDA [ ELPIDA MEMORY ]
