GD25Q32CxIGx 3.3V Uniform Sector Dual and Quad Serial Flash
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7. COMMANDS DESCRIPTION
All commands, addresses and data are shifted in and out of the device, beginning with the most significant bit
on the first rising edge of SCLK after CS# is driven low. Then, the one-byte command code must be shifted in
to the device, most significant bit first on SI, each bit being latched on the rising edges of SCLK.
See Table2, every command sequence starts with a one-byte command code. Depending on the command, this
might be followed by address bytes, or by data bytes, or by both or none. CS# must be driven high after the last
bit of the command sequence has been shifted in. For the command of Read, Fast Read, Read Status Register or
Release from Deep Power-Down, and Read Device ID, the shifted-in command sequence is followed by a data-
out sequence. CS# can be driven high after any bit of the data-out sequence is being shifted out.
For the command of Page Program, Sector Erase, Block Erase, Chip Erase, Write Status Register, Write
Enable, Write Disable or Deep Power-Down command, CS# must be driven high exactly at a byte boundary,
otherwise the command is rejected, and is not executed. That means CS# must be driven high when the number
of clock pulses after CS# being driven low is an exact multiple of eight. For Page Program, if CS# is driven high
at any time the input byte is not a full byte, nothing will happen and WEL will not be reset.
Table2. Commands (Standard/Dual/Quad SPI)
Command Name
Write Enable
Write Disable
Byte 1 Byte 2
Byte 3
Byte 4
Byte 5
Byte 6
n-Bytes
06H
04H
Volatile SR Write Enable 50H
Read Status Register-1
Read Status Register-2
Read Status Register-3
Write Status Register-1
Write Status Register-2
Write Status Register-3
Read Data
05H
35H
(S7-S0)
(S15-S8)
(continuous)
(continuous)
(continuous)
15H (S23-S16)
01H
31H
11H
03H
0BH
3BH
S7-S0
S15-S8
S23-S16
A23-A16
A23-A16
A23-A16
A15-A8
A15-A8
A15-A8
A7-A0
A7-A0
A7-A0
A7-A0
(D7-D0) (Next byte) (continuous)
dummy (D7-D0) (continuous)
dummy D7-D0 (1) (continuous)
Fast Read
Dual Output Fast Read
(Next
Dual I/O Fast Read
Quad Output Fast Read
Quad I/O Fast Read
BBH A23-A8 (2)
(D7-D0) (1)
A7-A0
(Next byte) (continuous)
byte)
dummy (D7-D0) (3) (continuous)
M7-M0 (2)
6BH
EBH
A23-A16
A23-A0
M7-M0 (4)
A15-A8
(Next
dummy (5)
dummy (6)
(D7-D0) (3)
(Next byte) (continuous)
byte)
Quad I/O Word Fast
Read (7)
A23-A0
(Next
E7H
(D7-D0) (3)
(Next byte) (continuous)
byte)
M7-M0 (4)
A23-A16
A23-A16
A23-A16
A23-A16
A23-A16
A23-A16
Page Program
Quad Page Program
Fast Page Program
Sector Erase
Block Erase (32K)
Block Erase (64K)
Chip Erase
02H
32H
F2H
20H
52H
D8H
C7/60H
66H
A15-A8
A15-A8
A15-A8
A15-A8
A15-A8
A15-A8
A7-A0
A7-A0
A7-A0
A7-A0
A7-A0
A7-A0
D7-D0
D7-D0 (3) Next byte continuous
D7-D0 Next byte continuous
Next byte continuous
Enable Reset
Reset
99H
Rev.1.0
50 - 12
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