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EL5220CY 参数 Datasheet PDF下载

EL5220CY图片预览
型号: EL5220CY
PDF下载: 下载PDF文件 查看货源
内容描述: 12MHz的轨至轨输入输出运算放大器 [12MHz Rail-to-Rail Input-Output Op Amps]
分类和应用: 运算放大器放大器电路光电二极管局域网
文件页数/大小: 13 页 / 278 K
品牌: ELANTEC [ ELANTEC SEMICONDUCTOR ]
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EL5220C, EL5420C  
12MHz Rail-to-Rail Input-Output Op Amps  
the peaking increase. The amplifiers drive 10pF loads in  
parallel with 10kW with just 1.5dB of peaking, and  
100pF with 6.4dB of peaking. If less peaking is desired  
in these applications, a small series resistor (usually  
between 5W and 50W) can be placed in series with the  
output. However, this will obviously reduce the gain  
slightly. Another method of reducing peaking is to add a  
“snubber” circuit at the output. A snubber is a shunt load  
consisting of a resistor in series with a capacitor. Values  
of 150W and 10nF are typical. The advantage of a snub-  
ber is that it does not draw any DC load current or  
reduce the gain  
JEDEC JESD51-3 and SEMI G42-88 (Single Layer) Test  
Board  
1200  
MAX T =125°C  
J
1000  
800  
600  
400  
200  
0
SO14  
=120°C/W  
833mW  
667mW  
q
JA  
LPP16  
=150°C/W  
q
JA  
606mW  
485mW  
TSSOP14  
=165°C/W  
q
JA  
MSOP8  
=206°C/W  
q
JA  
0
25  
50  
75 85 100  
125  
150  
Power Supply Bypassing and Printed Circuit  
Board Layout  
Ambient Temperature (°C)  
Figure 4. Package Power Dissipation vs  
Ambient Temperature  
The EL5220C and EL5420C can provide gain at high  
frequency. As with any high-frequency device, good  
printed circuit board layout is necessary for optimum  
performance. Ground plane construction is highly rec-  
ommended, lead lengths should be as short as possible  
and the power supply pins must be well bypassed to  
reduce the risk of oscillation. For normal single supply  
operation, where the VS- pin is connected to ground, a  
0.1µF ceramic capacitor should be placed from VS+ to  
pin to VS- pin. A 4.7µF tantalum capacitor should then  
be connected in parallel, placed in the region of the  
amplifier. One 4.7µF capacitor may be used for multiple  
devices. This same capacitor combination should be  
placed at each supply pin to ground if split supplies are  
to be used.  
JEDEC JESD51-7 High Effective Thermal Conductivity (4-  
Layer) Test Board  
(LPP exposed diepad soldered to PCB per JESD51-5)  
3
2.500W  
2.5  
2
1.5  
1
0.5  
0
0
25  
50  
75 85 100  
125  
150  
Ambient Temperature (°C)  
Figure 5. Package Power Dissipation vs  
Ambient Temperature  
Unused Amplifiers  
It is recommended that any unused amplifiers in a dual  
and a quad package be configured as a unity gain fol-  
lower. The inverting input should be directly connected  
to the output and the non-inverting input tied to the  
ground plane.  
Driving Capacitive Loads  
The EL5220C and EL5420C can drive a wide range of  
capacitive loads. As load capacitance increases, how-  
ever, the -3dB bandwidth of the device will decrease and  
12