EL4585C
Horizontal Genlock, 8 F
SC
e
verse bias control voltage, and C is varactor ca-
transfer function C
F(V ), where V is the re-
C C
v
Choosing Loop Filter
Components
The PLL, VCO, and loop filter can be described
V
pacitance. Since F(V ) is nonlinear, it is probably
about
C
best to build the VCO and measure K
VCO
as:
2.5V. The results of one such measurement are
shown below. The slope of the curve is deter-
mined by linear regression techniques and equals
e
9.06 Mrad/s/V.
K
VCO
. For our example, K
VCO
4585–13
F
OSC
vs V , LC VCO
C
Where:
e
K
phase detector gain in A/rad
d
e
F(s) loop filter impedance in V/A
e
K
VCO gain in rad/s/V
VCO
e
low)
N
Total internal or external divisor (see 3 be-
It can be shown that for the loop filter shown
below:
4585–14
5. Now we can solve for C , C , and R .
3
3
4
K K
d
C
2Ng0
n
VCO
2
3
e
e
e
, R
3
C
, C
3
4
b
(4.77e 5)(9.06e6)
K K
d
VCO
2
N0
10
K K
d VCO
n
e
e
e
e
e
0.01mF
C
3
4
2
N0
(1820)(5000)
n
e
filter damping factor.
e
Where 0
loop filter bandwidth, and g loop
n
C
3
e
C
0.001mF
e
EL4585C.
e
4.77e-5A/rad for the
1. K
300mA/2qrad
10
d
2Ng0
(2)(1820)(1)(5000)
2. The loop bandwidth should be about H-sync
frequency/20, and the damping ratio should be
1 for optimum performance. For our example,
n
e
e
42.1kX
R
3
b
(4.77e 5)(9.06e6)
K K
d
VCO
e
e
e
&
0
3. N
15.734kHz/20 787 Hz 5000 rad/S.
n
e
We choose R 43kX for convenience.
3
e
910x2
1820 from table 1.
6. Notice R has little effect on the loop filter de-
2
sign. R should be large, around 100k, and can
2
be adjusted to compensate for any static phase
F
28.636M
VCO
e
e
e
e
1820 910x2
N
F
15.73426k
represents how much the VCO frequen-
error T at lock, but if made too large, will
i
slow loop response. If R is made smaller, T
Hsync
4. K
2
i
(see timing diagrams) increases, and if R in-
VCO
cy changes for each volt applied at the control
pin. It is assumed (but probably isn’t) linear
about the lock point (2.5V). Its value depends
on the VCO configuration and the varactor
2
10
ELANTEC [ ELANTEC SEMICONDUCTOR ]
