EL4390C
Triple 80 MHz Video Amplifier with DC Restore
In normal circuit operation, the picture content
Applications Information
will also cause a slow change in voltage across the
capacitor, so at every back porch time period,
these error terms can be corrected.
Circuit Operation
Each channel of the EL4390 contains a current
feedback amplifier and a TTL/CMOS compatible
clamp circuit. The current that the clamp can
source or sink into the non-inverting input is ap-
proximately:
When a signal source is being switched, eg. from
two different surveillance cameras, it is recom-
mended to synchronize the switching with the
vertical blanking period, and to drive the HOLD
pin (pin 6) low, during these lines. This will en-
sure that the system has been completely re-
stored, regardless of the average intensity of the
two pictures.
e
b
V
I
(V
CLAMP
) / 120
a
IN
So, when the non-inverting input is at the same
voltage as the clamp reference, no current will
flow, and hence no charge is added to the capaci-
tor. When there is a difference in voltage, current
will flow, in an attempt to cancel the error AT
THE NON-INVERTING input. The amplifier’s
Application Hints
Figures 1 & 2 shows a three channel DC-restoring
system, suitable for R-G-B or Y-U-V component
video, or three synchronous composite signals.
c
offset voltage and (I
R ) DC errors are not
F
b
B
cancelled with this loop. It is purely a method of
adding a controlled DC offset to the signal.
Figure 1 shows the amplifiers configured for non-
inverting gain, and Figure 2 shows the amplifiers
configured for inverting gains. Note that since
the DC-restoring function is accomplished by
clamping the amplifier’s non-inverting input,
during the back porch period, any signal on the
non-inverting input will be distorted. For this
reason, it is recommended to use the inverting
configuration for composite video, since this
avoids the color burst being altered during the
clamp time period.
As well as the offset voltage error, which goes up
c
with gain, there is also the I
the amplifier is capacitively coupled, this small
current is slowly integrated and shows up as a
very slow ramp voltage. Table below shows the
output voltage drift in 60mS for various values of
coupling capacitor, all assuming the very worst
with gain, and the I
R error which drops
F
b
B
error term. Since
a
B
I
B
current.
a
Table 1. Charge Storage Capacitor Value vs.
Droop and Charging Rates
Since all three amplifiers are monolithic, they
run at the same temperature, and will have very
similar input bias currents. This can be used to
advantage, in situations where the droop voltage
needs to be compensated, since a single trim cir-
cuit can be used for all three channels. A 560KX
or similar value resistor helps to isolate each sig-
nal. See Figure 2. The advantage of compensat-
ing for the droop voltage, is that a smaller capaci-
tor can be used, which allows a larger level resto-
ration within one line. See Table 1 for values of
capacitor and charge/droop rates.
Cap Value
Droop in
Charge in
Charge in
(nF)
60mS (mV)
2mS (mV)
4mS (mV)
10
30
13.6
6.4
400
182
85
800
364
170
80
22
47
100
220
3.0
40
1.36
18
36
9
ELANTEC [ ELANTEC SEMICONDUCTOR ]
