EL4102C - Preliminary
500MHz Video Front End: 4-1 MUX, VGA & DC-Restore
Control Bits Logic Table
Bit
B7
B6
B5
B4
B3
B2
B1
B0
Function
Standby - Power Down
Gain Bit 4
Gain Bit 3
Gain Bit 2
Gain Bit 1
Gain Bit 0
Input Select Bit 1
Input Select Bit 0
Serial Timing Diagram
ENB
t
HE
t
SE
T
t
r
t
f
t
HE
t
SE
SCLK
SDI
t
SD
t
HD
t
w
B7
B6
B5
B4-B2
B1
B0
t
MSB
Load MSB first, LSB last
LSB
Serial Timing Parameters
Parameter
Example
≥100 ns
0.05 x T
≥40ns
Description
T
Clock Period
tr/tf
tHE
tSE
tHD
tSD
tw
Clock Rise/Fall Time
ENB Hold Time
ENB Setup Time
Data Hold Time
Data Setup Time
Clock Pulse Width
≥40ns
≥40ns
≥40ns
0.50 x T
5