EL2150C/EL2157C
125 MHz Single Supply, Clamping Op Amps
Closed Loop AC Electrical Characteristics
ea
ea
e
e
ea
ea
ea
ea
5V, A 1,
V
(Notes 2 & 6) V
e
5V, GND 0V, T
e
150X to GND pin, unless otherwise specified
25 C, V
§
1.5V, V
1.5V, V
5V, V
S
A
CM
OUT
CLAMP
ENABLE
R
0X, R
F
L
Test
Parameter
Description
Conditions
Min Typ Max
Units
Level
b
e
ea
ea
1, R
BW
3 dB Bandwidth (V
OUT
400 mVp-p)
V
V
V
V
V
V
5V, A
5V, A
5V, A
5V, A
0X
125
60
V
V
V
V
V
V
V
V
V
V
V
I
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
e
S
S
S
S
S
S
S
S
S
S
V
V
V
V
F
ea
ea
ea
ea
ea
ea
ea
ea
ea
eb
ea
ea
e
e
1, R
2, R
500X
500X
F
60
F
e
10, R
500X
0X
6
F
ea
e
F
12V, A
1, R
150
100
25
V
ea
e
0X
3V, A
1, R
V
F
e
ea
e
1, R 0X
F
g
BW
0.1 dB Bandwidth (V
OUT
400 mVp-p) V
12V, A
V
ea
ea
e
e
V
V
V
5V, A
3V, A
1, R
0X
0X
30
V
V
F
F
1, R
20
@
ea
GBWP
PM
Gain Bandwidth Product
Phase Margin
12V,
1 kX, CL 6 pF
A
V
10
60
e
e
R
55
§
V/ms
V/ms
ns
L
ea
ea
e
e
a
0V to 6V
SR
Slew Rate
V
S
V
S
10V, R
150X, V
200 275
300
2.8
L
out
e
e
a
0V to 3V
5V, R
150X, V
V
V
V
V
V
V
V
V
V
L
OUT
g
g
g
t
,t
Rise Time, Fall Time
Overshoot
0.1V step
0.1V step
0.1V step
R
F
OS
10
%
t
t
Propagation Delay
0.1% Settling Time
0.01% Settling Time
Differential Gain (Note 7)
3.2
ns
PD
S
e
e
e
e
ea
e
e
g
g
g
g
V
V
A
A
5V, R
5V, R
500X, A
500X, A
1 kX
1, V
3V
3V
40
ns
S
L
V
V
OUT
ea
1, V
75
ns
S
L
OUT
ea
ea
e
e
dG
dP
2, R
0.05
0.05
48
%
V
V
F
F
Differential Phase (Note 7)
Input Noise Voltage
2, R
1 kX
§
e
e
e
N
f
f
10 kHz
10 kHz
nV Hz
0
i
N
Input Noise Current
1.25
V
pA Hz
0
t
t
t
Disable Time (Note 8)
Enable Time (Note 8)
Clamp Overload Recovery
50
25
7
V
V
V
ns
ns
ns
DIS
EN
CL
Note 1: Internal short circuit protection circuitry has been built into the EL2150C/EL2157C. See the Applications section.
Note 2: CLAMP pin and ENABLE pin specifications apply only to the EL2157C.
Note 3: If the disable feature is not desired, tie the ENABLE pin to the V pin, or apply a logic high level to the ENABLE pin.
S
Note 4: The maximum output voltage that can be clamped is limited to the maximum positive output Voltage, or V . Applying a
OP
Voltage higher than V
inactivates the clamp. If the clamp feature is not desired, either tie the CLAMP pin to the V pin,
S
OP
or simply let the CLAMP pin float.
Note 5: The clamp accuracy is affected by V and R . See the Typical Curves Section and the Clamp Accuracy vs. V & R curve.
IN IN
L
L
Note 6: All AC tests are performed on a ‘‘warmed up’’ part, except slew rate, which is pulse tested.
e
e
286 mVp-p, f 3.58MHz, as VIN is swept from 0.6V to 1.314V. R is DC coupled.
L
Note 7: Standard NTSC signal
Note 8: Disable/Enable time is defined as the time from when the logic signal is applied to the ENABLE pin to when the supply
current has reached half its final value.
4
ELANTEC [ ELANTEC SEMICONDUCTOR ]
