EL2006/EL2006A
High Gain Fast FET Input Op Amp
Power Dissipation
Applications Information Ð Contd.
characteristic is well behaved well beyond the
unity gain frequency so that spurious ringing or
oscillation in the 100 MHZ–200 MHz region is
avoided. Finally, we have provided temperature
compensation so that gain and stability are rela-
tively constant over temperature.
There is an additional effect on input bias current
as the input voltage is changed. The effect, com-
mon to all FETs, is an avalanche-like increase in
gate current as the FET gate-to-drain voltage is
increased above a critical value, depending on
FET geometry and doping levels. This effect will
be noted as the input voltage of the EL2006 is
taken below ground potential when the supplies
These improvements are provided in a configura-
tion which is plug compatible with LH0032 and
similar products so that designers can easily up-
grade their system performance without exten-
sive re-design. In most cases, the EL2006 can be
used to replace LH0032 with no change in exter-
nal compensation.
g
are 15V. All of the effects described here may
be minimized by operating the device with
s
g
V
S
15V.
These effects are indicated in the typical per-
formance curves.
Input Capacitance
Video DAC Amplifiers
The input capacitance to the EL2006/EL2006A
is typically 2 pF and thus may form a significant
time constant with high value resistors. For opti-
mum performance, the input capacitance to the
inverting input should be compensated by a
small capacitor across the feedback resistor. The
value is strongly dependent on layout and closed
loop gain, but will typically be in the neighbor-
hood of several picofarads.
A typical application for the EL2006 is to pro-
vide gain for video signals. In the example
shown, the EL2006 provides a gain of 2 with set-
tling time around 35 ns to 10 mV.
Power Supply Decoupling
The EL2006/EL2006A, like most high-speed cir-
cuits, is sensitive to layout and stray capacitance.
Power supplies should be bypassed as near to
pins 10 and 12 as possible with low inductance
capacitors such as 0.01 mF disc ceramics. Com-
pensation components should also be located
close to the appropriate pins to minimize stray
reactances.
In the non-inverting configuration, it may be ad-
vantageous to bootstrap the case and/or a guard
conductor to the inverting input. This serves
both to divert leakage currents away from the
non-inverting input and to reduce the effective
input capacitance. A unity gain follower so treat-
ed will have an input capacitance under a 1 pF.
Input Current
Because the input devices are FETs, the input
bias current may be expected to double for each
11 C junction temperature rise. This characteris-
§
tic is plotted in the typical performance charac-
teristics graphs. The device will self-heat due to
internal power dissipation after application of
power, thus raising the FET junction tempera-
ture 40 C–60 C above the free-air ambient tem-
§
§
g
perature when supplies are
15V. The device
temperature will stabilize within 5–10 minutes
after application of power, and the input bias cur-
rents measured at the time will be indicative of
normal operating currents. An additional rise will
occur as power is delivered to a load due to addi-
tional internal power dissipation.
2006–6
5
ELANTEC [ ELANTEC SEMICONDUCTOR ]
