AN75
sense signal and the switching adjusts to be the sum of the on- and off-time. This change allows the
converter to work with duty cycles greater than 50%.
Design Guide – High power factor offline LED driver
In this section the design procedure is outlined according to the schematic shown in Figure 1. First,
the guideline for selecting the components for valley fill power factor correction stage and fixed off-
time buck converter is shown. The power inductor calculation is then demonstrated and finally, the
power losses within MOSFET and free-wheel diode are assessed.
The specifications for the system are:
V
AC
= 230Vac
V
AC(min)
= 85Vac
V
AC(max)
= 264Vac
I
LED(nom)
= 240mA
V
LED(nom)
= 54V
V
LED(min)
= 42V
V
LED(max)
= 59V
P
OUT
= 12.96W
f
swi(nom)
= 55kHz
Passive factor correction stage design
The purpose of the valley fill circuit (see Figure 2) is to allow the buck converter to pull power directly
off the AC line when the line voltage is greater than 50% of its peak voltage.
Figure 2 Valley-fill PFC stage and operating waveforms (Green: V
IN
to LED driver; Orange:
AL9910’s gate voltage)
The maximum bus voltage at the input of the buck converter is,
V
IN(max)
=
2
×
V
ac(max)
=
2
×
264 Vac
=
373 V
During this time, capacitors within the valley fill circuit (C1 and C2) are in series and charged via D2
and R1. If the capacitors have identical capacitance value, the peak voltage across C1 and C2
Issue 1 – January 2011
© Diodes Incorporated 2010
2
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