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DR805X 参数 Datasheet PDF下载

DR805X图片预览
型号: DR805X
PDF下载: 下载PDF文件 查看货源
内容描述: 8位RISC微控制器指令集的详细信息3.10版本 [8-bit RISC Microcontroller Instructions set details ver 3.10]
分类和应用: 微控制器
文件页数/大小: 79 页 / 249 K
品牌: DCD [ DIGITAL CORE DESIGN ]
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DR805x Instructions set details  
- 6 -  
1. OVERVIEW  
1.1. DOCUMENT STRUCTURE.  
Document contains brief description of DR805X instructions. This manual is intended  
for design engineers who are planning to use the DR805X HDL core in conjunction with  
software assembler, compiler and debugger tools.  
2. INSTRUCTIONS SET BRIEF  
2.1. INSTRUCTION SET NOTES  
The DR805X has five different addressing modes: immediate, direct, register, indirect  
and relative. In the immediate addressing mode the data is contained in the opcode. By  
direct addressing an eight bit address is a part of the opcode, by register addressing, a  
register is selected in the opcode for the operation. In the indirect addressing mode, a  
register is selected in the opcode to point to the address used by the operation. The  
relative addressing mode is used for jump instructions.  
The following tables give a survey about the instruction set cycles of the DR805X  
microcontroller core. One cycle is equal to one clock period.  
Table 1 and Table 2 contain notes for mnemonics used in Instruction set tables. Tables 3 -  
7 show instruction hexadecimal codes, number of bytes and machine cycles that each  
instruction takes to execute.  
Rn  
Working register R0-R7  
direct  
@Ri  
#data  
#data 16  
bit  
128 internal RAM locations, any Special Function Registers  
Indirect internal or external RAM location addressed by register R0 or R1  
8-bit constant included in instruction  
16-bit constant included as bytes 2 and 3 of instruction  
256 software flags, any bit-addressable l/O pin, control or status bit  
Accumulator  
A
B
B working register  
C
Carry flag  
Table 1. Notes on data addressing modes  
addr16  
addr11  
rel  
Destination address for LCALL and LJMP may be anywhere within the 64-Kbyte of  
program memory address space.  
Destination address for ACALL and AJMP will be within the same 2-Kbyte page of  
program memory as the first byte of the following instruction.  
SJMP and all conditional jumps include an 8-bit offset byte. Range is +127/-128  
bytes relative to the first byte of the following instruction  
Table 2. Notes on program addressing modes  
All trademarks mentioned in this document  
are trademarks of their respective owners.  
http://www.DigitalCoreDesign.com  
http://www.dcd.pl  
Copyright 1999-2003 DCD – Digital Core Design. All Rights Reserved.