DR805x Instructions set details
- 51 -
3.24.11.
MOV DIRECT, @RI
Operation: (PC) ← (PC) + 2
(direct) ← ((Ri))
Bytes:
2
Cycles:
3 – direct inside SFR
4 – direct inside RAM
Encoding:
1
0
0
0
0
1
1
i
direct address
3.24.12.
MOV DIRECT, #DATA
Operation:
(PC) ← (PC) + 2
(direct) ← #data
Bytes:
Cycles:
3
3
Encoding:
0
1
1
1
0
1
0
1
direct address (source)
immediate data
3.24.13.
MOV @RI, A
Operation:
(PC) ← (PC) + 1
((Ri)) ← (A)
Bytes:
Cycles:
1
3
Encoding:
1
1
1
1
0
1
1
i
3.24.14.
MOV @RI, DIRECT
Operation: (PC) ← (PC) + 2
((Ri)) ← (direct)
Bytes:
Cycles:
2
4
Encoding:
1
0
1
0
0
1
1
i
direct address
All trademarks mentioned in this document
are trademarks of their respective owners.
http://www.DigitalCoreDesign.com
http://www.dcd.pl
Copyright 1999-2003 DCD – Digital Core Design. All Rights Reserved.
DCD [ DIGITAL CORE DESIGN ]
