DP805x Instructions set details
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2.3. INSTRUCTION SET BRIEF – HEXADECIMAL ORDER
Opcode
00 H
01 H
02 H
03 H
04 H
05 H
06 H
07 H
08 H
09 H
0A H
0B H
0C H
0D H
0E H
0F H
10 H
11 H
12 H
13 H
14 H
15 H
16 H
17 H
18 H
19 H
1A H
1B H
1C H
1D H
1E H
1F H
20 H
21 H
22 H
23 H
24 H
25 H
26 H
27 H
28 H
29 H
2A H
2B H
2C H
2D H
2E H
2F H
Mnemonic
Opcode
30 H
31 H
32 H
33 H
34 H
35 H
36 H
37 H
38 H
39 H
3A H
3B H
3C H
3D H
3E H
3F H
40 H
41 H
42 H
43 H
44 H
45 H
46 H
47 H
48 H
49 H
4A H
4B H
4C H
4D H
4E H
4F H
50 H
51 H
52 H
53 H
54 H
55 H
56 H
57 H
58 H
59 H
5A H
5B H
5C H
5D H
5E H
5F H
Mnemonic
JNB bit.rel
ACALL addr11
RETI
NOP
AJMP addr11
LJMP addr16
RR A
RLC A
INC A
ADDC A,#data
ADDC A,direct
ADDC A,@R0
ADDC A,@R1
ADDC A,R0
ADDC A,R1
ADDC A,R2
ADDC A,R3
ADDC A,R4
ADDC A,R5
ADDC A,R6
ADDC A,R7
JC rel
AJMP addr11
ORL direct,A
ORL direct,#data
ORL A,#data
ORL A,direct
ORL A,@R0
ORL A,@R1
ORL A,R0
ORL A,R1
ORL A,R2
ORL A,R3
ORL A,R4
ORL A,R5
ORL A,R6
ORL A,R7
JNC rel
ACALL addr11
ANL direct,A
ANL direct,#data
ANL A,#data
ANL A,direct
ANL A,@R0
ANL A,@R1
ANL A,R0
ANL A,R1
ANL A,R2
ANL A,R3
ANL A,R4
INC direct
INC @R0
INC @R1
INC R0
INC R1
INC R2
INC R3
INC R4
INC R5
INC R6
INC R7
JBC bit,rel
ACALL addr11
LCALL addr16
RRC A
DEC A
DEC direct
DEC @R0
DEC @R1
DEC R0
DEC R1
DEC R2
DEC R3
DEC R4
DEC R5
DEC R6
DEC R7
JB bit.rel
AJMP addr11
RET
RL A
ADD A,#data
ADD A,direct
ADD A,@R0
ADD A,@R1
ADD A,R0
ADD A,R1
ADD A,R2
ADD A,R3
ADD A,R4
ADD A,R5
ADD A,R6
ADD A,R7
ANL A,R5
ANL A,R6
ANL A,R7
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DCD [ DIGITAL CORE DESIGN ]
