DM9302
10/100Mbps Ethernet Fiber/Twisted Pair Media Converter with Local bus
8.8 DAVICOM Specified Configuration Register (DSCR) – 10H ...................................................................... 43
8.9 DAVICOM Specified Configuration and Status Register (DSCSR) – 11H ................................................ 44
8.10 10BASE-T Configuration/Status (10BTCSR) – 12H.................................................................................. 45
8.11 Power Down Control Register (PWDOR) – 13H........................................................................................ 45
8.12 (Specified config) Register – 14H .............................................................................................................. 46
8.13 DAVICOM Specified Receive Error Counter Register (RECR) – 16H ..................................................... 47
8.14 DAVICOM Specified Disconnect Counter Register (DISCR) – 17H ........................................................ 47
8.15 Power Saving Control Register (PSCR) – 1DH ......................................................................................... 47
9.
FUNCTIONAL DESCRIPTION....................................................................................... 48
9.1 Processor bus and memory management function: ................................................................................. 48
9.1.1 Processor Interface .................................................................................................................................. 48
9.1.2 Direct Memory Access Control................................................................................................................. 48
9.1.3 Packet Transmission................................................................................................................................ 48
9.1.4 Packet Reception ..................................................................................................................................... 48
9.2 Switch function:............................................................................................................................................. 49
9.2.1 Address Learning ..................................................................................................................................... 49
9.2.2 Address Aging .......................................................................................................................................... 49
9.2.3 Packet Forwarding ................................................................................................................................... 49
9.2.4 Inter-Packet Gap (IPG) ............................................................................................................................ 49
9.2.5 Back-off Algorithm.................................................................................................................................... 49
9.2.6 Late Collision............................................................................................................................................ 49
9.2.7 Half Duplex Flow Control ......................................................................................................................... 49
9.2.8 Full Duplex Flow Control .......................................................................................................................... 49
9.2.9 Partition Mode .......................................................................................................................................... 49
9.2.10 Broadcast Storm Filtering....................................................................................................................... 50
9.2.11 Bandwidth Control.................................................................................................................................. 50
9.2.12 Port Monitoring Support ......................................................................................................................... 50
6
Preliminary datasheet
DM9302-15-DS-P01
July 30, 2009
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
