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DM9010BIEP 参数 Datasheet PDF下载

DM9010BIEP图片预览
型号: DM9010BIEP
PDF下载: 下载PDF文件 查看货源
内容描述: 工业温度10/100 Mbps的单芯片以太网控制器,带有通用处理器接口 [Industrial-temperature 10/100 Mbps Single Chip Ethernet Controller With General Processor Interface]
分类和应用: 控制器以太网局域网(LAN)标准
文件页数/大小: 60 页 / 448 K
品牌: DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
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DM9010BI
Industrial-temperature Single Chip Ethernet Controller with General Processor Interface
5. PIN DESCRIPTION
I= Input, O=Output, I/O= Input/Output, O/D= Open Drain, P= Power,
LI= reset Latch Input, #= asserted low, PD=internal pull-low about 60K ohm, PU=internal pull-high
5.1 MII Interface
Pin No.
37
41,40,39,
38
43
Pin Name
LINK_I
RXD [3:0]
CRS
I/O
I,PD
I,PD
External MII device link status
Description
44
45
46
47
49
53,52,51,
50
COL
RX_DV
RX_ER
RX_CLK
TX_CLK
TXD [3:0]
External MII Receive Data
4-bit nibble data input (synchronous to RXCLK) when in 10/100 Mbps. MII mode
I/O,PD External MII Carrier Sense
Active high to indicate the pressure of carrier, due to receive or transmit activities
in 10 Base-T or 100 Base-TX modes. This pin is output in reverse MII interface.
I/O,PD External MII Collision Detect. This pin is output in reverse MII interface.
I,PD
I,PD
I,PD
External MII Receive Data Valid
External MII Receive Error
External MII Receive Clock
I/O,PD External MII Transmit Clock. This pin in output in MII interfaces.
O,PD
External MII Transmit Data
4-bit nibble data outputs (synchronous to the TX_CLK) when in 10/100Mbps
nibble mode
TXD [2:0] is also used as the strap pins of IO base address.
IO base = (strap pin value of TXD [2:0]) * 10H + 300H
External MII Transmit Enable
54
56
57
TX_ EN
MDIO
MDC
O,PD
I/O,PD MII Serial Management Data
O,PD
MII Serial Management Data Clock
This pin is also used as the strap pin of the polarity of the INT pin
When the MDC pin is pulled high, the INT pin is low active; otherwise the INT pin
is high active
5.2 Processor Interface
1
IOR#
I,PD
Processor Read Command
This pin is low active at default; its polarity can be modified by EEPROM setting.
See the EEPROM content description for detail
Processor Write Command
This pin is low active at default; its polarity can be modified by EEPROM setting.
See the EEPROM content description for detail
Address Enable
A low active signal used to select the DM9010BI.
Processor Command Ready
When a command is issued before last command is completed, the IOWAIT will
be pulled low to indicate the current command is waited
The polarity and output type can be updated by EEPROM. The default is
Open-Drain output and low active.
2
IOW#
I,PD
3
AEN
I,PD
4
IOWAIT
O,PD
Preliminary
Version: DM9010BI--DS-P01
January 12, 2010
9