DM9016
3-port switch with Processor Interface
(1). Check the busy bit of Ethernet Address
Control/Status Register 1 (Reg70H.0) to seek
the availability of access engine. Waiting until
engine is available and to keep on following.
9.2.16 Access Rules of Address Table
The DM9016 The procedure and flow chart of Entry
Write is described as following:
(2). Write the MAC address to the Ethernet Address
Data Register (Reg71H~76H).
Entry Write
(3). Write the “SEARCH” command and assign the
target table to Ethernet Address Control/Status
Register 1 (Reg70H.[4:1]) to start the operation.
(1). Check the busy bit of Ethernet Address
Control/Status Register 1 (Reg70H.0) to seek
the availability of access engine. Waiting until
engine is available and to keep on following.
(4). Check the busy bit again, wait for available.
(5). Read the command status from Ethernet
(2). Write the MAC address to the Ethernet Address
Data Registers (Reg71H~76H).
Address
Control/Status
Register
1
(Reg70H.[6:5]).
(3). Write the Port Number (if target is unicast
address table) or Port Map (if target is multicast
address table) to Ethernet Address Data
Register (Reg77H.[3:0]).
(6). Read the Port Number or Port Map from
Ethernet Address Control/Status Register 2
(Reg77H.[3:0])
(7). If need, read the entry sequence (the sequence
number of entry in address table) from Ethernet
Address Data Register (Reg71H~72H).
(4). If need, write the entry’s attributes that includes
both static and overriding to Ethernet Address
Control/Status Register 1 (Reg77H).
(8). If need, read the entry’s attributes that include
static (unicast address table only), IGMP
signature (multicast address table only) and
overriding from Ethernet Address Control/Status
Register 2 (77H.[6:4]).
(5). Write the “WRITE” command and assign the
target table to Ethernet Address Control/Status
Register 1 (Reg70H.[4:1]) to start the operation.
(6). Check the busy bit again, wait for available.
(7). Read the command status from Ethernet
Address
(Reg70H.[6:5]).
Control/Status
Register
1
Entry Read
(1). Check the busy bit of Ethernet Address
Control/Status Register 1 (Reg70H.0) to seek
the availability of access engine. Waiting until
engine is available and to keep on following.
Entry Delete
(1). Check the busy bit of Ethernet Address
Control/Status Register 1 (Reg70H.0) to seek
the availability of access engine. Waiting until
engine is available and to keep on following.
(2). Write the entry sequence to the Ethernet
Address Data Register (Reg71H~76H).
(3). Write the “READ” command and assign the
target table to Ethernet Address Control/Status
Register 1 (Reg70H.[4:1]) to start the operation.
(2). Write the MAC address to the Ethernet Address
Data Register (Reg71H~76H).
(4). Check the busy bit again, wait for available.
(3). Write the “DELETE” command and assign the
target table to Ethernet Address Control/Status
Register 1 (Reg70H.[4:1]) to start the operation.
(5). Read the command status from Ethernet
Address Control/Status Register 1 (70H.[6:5]).
(4). Check the busy bit again, wait for available.
(6). Read the Port Number or Port Map from
Ethernet Address Control/Status Register 2
(Reg77H.[3:0])
(5). Read the command status from Ethernet
Address
Control/Status
Register
1
(Reg70H.[6:5]).
(7). If target is unicast or multicast address table,
read the entry’s MAC address from Ethernet
Address Data Register (Reg71H~76H). If target
is IGMP membership table, read the entry
Entry Search
Preliminarydatasheet
67
DM9016-13-DS-P01
March 26, 2009
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
