DM562P
V.90 Integrated Data/ Fax/Voice/Speakerphone
Modem Device Single Chip with Memory Built in
DM6588 Pin Description
Pin No.
External
Pin No.
Internal
PCI
Pin No.
Internal
ISA
Pin Name
I/O
Description
1
1
1
TEST4
I
Test pin 4, normal ground.
External: N/C (low).
PCI: N/C (low).
ISA: connect to 3.3V.
2,3,4,5,
9,10,11,
12
UD0 - UD7
O
Modem Control Output, for external modem:
Memory address mapping of the controller is
E800H.
8
RxDCLK
RD_SP2
I
I
Receive Data Rate Clock:(External)
This pin is used as reference clock of DSPRXD
pin.
Data Input Pin Of The Serial Port 2:
The serial data is sampled at the falling edge of the
SCLK. The MSB is coming immediately after the
falling of FR_SP2 signal.
18
68
68
19
21
28
TXDCLK
DSPTxD
RD_SP1
I
I
I
Transmit Data Rate Clock:(External)
This pin is used as reference clock of DSPTXD
pin.
Modem Transmit Data (External)
Shifted into DM6581/DM6582 from EIA port
through this pin at the rising edge of TXDCLK.
Data Input Pin Of The Serial Port 1:
The serial data is sampled at the falling edge of the
SCLK. The MSB is coming immediately after the
falling of FR_SP1 signal.
69
69
6,20,37
50,77,80, 50,80,89
89,107,
118,123
22,
6,20,37
6,20,37
50,77,80,
89,107,
GND
P
O
I
Ground
107,118,
123
118,123
OUTP3,
OUTP2,
OUTP1,
OUTP0
INP3,
INP2,
INP1,
INP0
Modem Control Output
23,
24,
25
29,
30,
31,
32
For external modem, these pins are bit7~4 of the
modem control output. Memory address mapping
of the controller is C800H.
Modem Control Input:(External)
These pins are bit3~0 of the modem control input.
Memory address mapping of the controller is
C800H.
33,45
67,94,
113,128
13,74
34
33,45,
67,94,
113,128
13,74
34
33,45,
67,94,
113,128
13,74
34
VDD
P
+3.3V Power Supply
VCC
P
I
I
+2.5V Power Supply
TEST2
TEST3
RESET
Test pin 2,normal ground
Test pin 3,normal ground
Reset:
35
36
35
35
I
An active high signal used to reset the DM6588.
Crystal Oscillator Input
42
42
42
XTAL1
I
8
Final
Version: DM562P-DS-F01
February 02, 2004